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authorMasahiro Yamada <yamada.m@jp.panasonic.com>2015-02-05 14:30:23 +0900
committerMasahiro Yamada <yamada.m@jp.panasonic.com>2015-02-07 00:14:57 +0900
commit7168da163880fc60c4e8d00f3d61eb6f009ffe56 (patch)
treeeb6a53fc5192ee3ca7e4bc379ddd9e6cb44d5514 /doc/README.uniphier
parent75bc8e85b5aa44c8f834ec9518c8ca4a7c1d7067 (diff)
ARM: UniPhier: add a simple README file for UniPhier platform
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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+U-Boot for UniPhier SoC family
+==============================
+
+
+Tested toolchains
+-----------------
+
+ (a) Ubuntu packages (CROSS_COMPILE=arm-linux-gnueabi-)
+
+ If you are building U-Boot on Ubuntu, its standard package is recommended.
+ You can install it as follows:
+
+ $ sudo apt-get install gcc-arm-linux-gnueabi-
+
+ (b) Linaro compilers (CROSS_COMPILE=arm-linux-gnueabihf-)
+
+ You can download pre-built toolchains from:
+
+ http://www.linaro.org/downloads/
+
+ (c) kernel.org compilers (CROSS_COMPILE=arm-unknown-linux-gnueabi-)
+
+ You can download pre-built toolchains from:
+
+ ftp://www.kernel.org/pub/tools/crosstool/files/bin/
+
+
+Compile the source
+------------------
+
+PH1-Pro4:
+ $ make ph1_pro4_defconfig
+ $ make CROSS_COMPILE=arm-linux-gnueabi-
+
+PH1-LD4:
+ $ make ph1_ld4_defconfig
+ $ make CROSS_COMPILE=arm-linux-gnueabi-
+
+PH1-sLD8:
+ $ make ph1_sld8_defconfig
+ $ make CROSS_COMPILE=arm-linux-gnueabi-
+
+You may wish to change the "CROSS_COMPILE=arm-linux-gnueabi-"
+to use your favorite compiler.
+
+
+Burn U-Boot images to NAND
+--------------------------
+
+Write two files to the NAND device as follows:
+ - spl/u-boot-spl.bin at the offset address 0x00000000
+ - u-boot-dtb.img at the offset address 0x00010000
+
+If a TFTP server is available, the images can be easily updated.
+Just copy the u-boot-spl.bin and u-boot-dtb.img to the TFTP public directory,
+and then run the following command at the U-Boot command line:
+
+ => run nandupdate
+
+
+UniPhier specific commands
+--------------------------
+
+ - pinmon (enabled by CONFIG_CMD_PINMON)
+ shows the boot mode pins that has been latched at the power-on reset
+
+ - ddrphy (enabled by CONFIG_CMD_DDRPHY_DUMP)
+ shows the DDR PHY parameters set by the PHY training
+
+
+Supported devices
+-----------------
+
+ - UART (on-chip)
+ - NAND
+ - USB (2.0)
+ - LAN (on-board SMSC9118)
+ - I2C
+ - EEPROM (connected to the on-board I2C bus)
+ - Support card (SRAM, NOR flash, some peripherals)
+
+
+--
+Masahiro Yamada <yamada.m@jp.panasonic.com>
+Feb. 2015