diff options
author | AKASHI Takahiro <takahiro.akashi@linaro.org> | 2020-04-27 15:46:45 +0900 |
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committer | Simon Glass <sjg@chromium.org> | 2020-05-29 20:55:45 -0600 |
commit | 5e61c4e89d252e7d909d0129682ea48516912e6c (patch) | |
tree | 19bef9d6961f547d0cfa02d9d06632851a86b53e /doc/SPI | |
parent | 02c770b4e416e81429e9809b16d2656141a3e61c (diff) |
sandbox: update documents regarding spi_sf
Since the commit 1289e96797bf ("sandbox: spi: Drop command-line SPI
option"), "--spi_sf" command line option is no longer supported.
So update the following documents to sync them up with the change.
doc/arch/sandbox.rst
doc/SPI/README.sandbox-spi
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'doc/SPI')
-rw-r--r-- | doc/SPI/README.sandbox-spi | 58 |
1 files changed, 18 insertions, 40 deletions
diff --git a/doc/SPI/README.sandbox-spi b/doc/SPI/README.sandbox-spi index dfa845cc82..f6a55fe780 100644 --- a/doc/SPI/README.sandbox-spi +++ b/doc/SPI/README.sandbox-spi @@ -2,59 +2,37 @@ Sandbox SPI/SPI Flash Implementation ==================================== U-Boot supports SPI and SPI flash emulation in sandbox. This must be enabled -using the --spi_sf paramter when starting U-Boot. +via a device tree. For example: -$ make O=sandbox sandbox_config -$ make O=sandbox -$ ./sandbox/u-boot --spi_sf 0:0:W25Q128:b/chromeos_peach/out/image.bin - -The four parameters to spi_sf are: - - SPI bus number (typically 0) - SPI chip select number (typically 0) - SPI chip to emulate - File containing emulated data + spi@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0 1>; + compatible = "sandbox,spi"; + cs-gpios = <0>, <&gpio_a 0>; + spi.bin@0 { + reg = <0>; + compatible = "spansion,m25p16", "jedec,spi-nor"; + spi-max-frequency = <40000000>; + sandbox,filename = "spi.bin"; + }; + }; Supported chips are W25Q16 (2MB), W25Q32 (4MB) and W25Q128 (16MB). Once U-Boot it started you can use 'sf' commands as normal. For example: -$ ./b/sandbox/u-boot --spi_sf 0:0:W25Q128:b/chromeos_peach/out/image.bin \ - -c "sf probe; sf test 0 100000; sf read 0 1000 1000; \ - sf erase 1000 1000; sf write 0 1000 1000" - - -U-Boot 2013.10-00237-gd4e0fdb (Nov 07 2013 - 20:08:15) - -DRAM: 128 MiB -Using default environment - -In: serial -Out: serial -Err: serial -SF: Detected W25Q128BV with page size 256 Bytes, erase size 4 KiB, total 16 MiB -SPI flash test: -0 erase: 1 ticks, 1024000 KiB/s 8192.000 Mbps -1 check: 2 ticks, 512000 KiB/s 4096.000 Mbps -2 write: 6 ticks, 170666 KiB/s 1365.328 Mbps -3 read: 0 ticks, 1048576000 KiB/s -201326.-592 Mbps -Test passed -0 erase: 1 ticks, 1024000 KiB/s 8192.000 Mbps -1 check: 2 ticks, 512000 KiB/s 4096.000 Mbps -2 write: 6 ticks, 170666 KiB/s 1365.328 Mbps -3 read: 0 ticks, 1048576000 KiB/s -201326.-592 Mbps -SF: 4096 bytes @ 0x1000 Read: OK -SF: 4096 bytes @ 0x1000 Erased: OK -SF: 4096 bytes @ 0x1000 Written: OK - +$ dd if=/dev/zero of=spi.bin bs=1M count=2 +$ u-boot -T Since the SPI bus is fully implemented as well as the SPI flash connected to it, you can also use low-level SPI commands to access the flash. For example this reads the device ID from the emulated chip: => sspi 0 32 9f -FFEF4018 +SF: Detected m25p16 with page size 256 Bytes, erase size 64 KiB, total 2 MiB +FF202015 Simon Glass |