diff options
author | Tom Rini <trini@konsulko.com> | 2020-04-13 11:27:00 -0400 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2020-04-13 11:27:00 -0400 |
commit | 891483186052b259852f3f48926ff307763f4eb0 (patch) | |
tree | 019e4a490e40ad5459f7dd3d4129021be696c495 /doc/board | |
parent | 36fec02b1f90b92cf51ec531564f9284eae27ab4 (diff) | |
parent | 67bbc1ecd311c78b06e845a3fd4e333806782367 (diff) |
Merge branch 'next'
Pull in changes that have been pending in our 'next' branch. This
includes:
- A large number of CI improvements including moving to gcc-9.2 for all
platforms.
- amlogic, xilinx, stm32, TI SoC updates
- USB and i2c subsystem updtaes
- Re-sync Kbuild/etc logic with v4.19 of the Linux kernel.
- RSA key handling improvements
Diffstat (limited to 'doc/board')
-rw-r--r-- | doc/board/st/stm32mp1.rst | 42 | ||||
-rw-r--r-- | doc/board/xilinx/zynq.rst | 3 |
2 files changed, 34 insertions, 11 deletions
diff --git a/doc/board/st/stm32mp1.rst b/doc/board/st/stm32mp1.rst index 1640bf910e..b7a0fbfd03 100644 --- a/doc/board/st/stm32mp1.rst +++ b/doc/board/st/stm32mp1.rst @@ -25,6 +25,14 @@ It features: - Standard connectivity, widely inherited from the STM32 MCU family - Comprehensive security support +Each line comes with a security option (cryptography & secure boot) and +a Cortex-A frequency option: + + - A : Cortex-A7 @ 650 MHz + - C : Secure Boot + HW Crypto + Cortex-A7 @ 650 MHz + - D : Cortex-A7 @ 800 MHz + - F : Secure Boot + HW Crypto + Cortex-A7 @ 800 MHz + Everything is supported in Linux but U-Boot is limited to: 1. UART @@ -416,20 +424,26 @@ For STMicroelectonics board, it is retrieved in STM32MP15x OTP : - OTP_58[15:0] = MAC_ADDR[47:32] To program a MAC address on virgin OTP words above, you can use the fuse command -on bank 0 to access to internal OTP: +on bank 0 to access to internal OTP and lock them: Prerequisite: check if a MAC address isn't yet programmed in OTP -1) check OTP: their value must be equal to 0 +1) check OTP: their value must be equal to 0:: + + STM32MP> fuse sense 0 57 2 + Sensing bank 0: + Word 0x00000039: 00000000 00000000 + +2) check environment variable:: - STM32MP> fuse sense 0 57 2 - Sensing bank 0: - Word 0x00000039: 00000000 00000000 + STM32MP> env print ethaddr + ## Error: "ethaddr" not defined -2) check environment variable +3) check lock status of fuse 57 & 58 (at 0x39, 0=unlocked, 1=locked):: - STM32MP> env print ethaddr - ## Error: "ethaddr" not defined + STM32MP> fuse sense 0 0x10000039 2 + Sensing bank 0: + Word 0x10000039: 00000000 00000000 Example to set mac address "12:34:56:78:9a:bc" @@ -443,11 +457,19 @@ Example to set mac address "12:34:56:78:9a:bc" Sensing bank 0: Word 0x00000039: 78563412 0000bc9a -3) next REBOOT, in the trace:: +3) Lock OTP:: + + STM32MP> fuse prog 0 0x10000039 1 1 + + STM32MP> fuse sense 0 0x10000039 2 + Sensing bank 0: + Word 0x10000039: 00000001 00000001 + +4) next REBOOT, in the trace:: ### Setting environment from OTP MAC address = "12:34:56:78:9a:bc" -4) check env update:: +5) check env update:: STM32MP> env print ethaddr ethaddr=12:34:56:78:9a:bc diff --git a/doc/board/xilinx/zynq.rst b/doc/board/xilinx/zynq.rst index 3f0513ed36..6a09df1d15 100644 --- a/doc/board/xilinx/zynq.rst +++ b/doc/board/xilinx/zynq.rst @@ -32,7 +32,8 @@ Building configure and build for zc702 board:: - $ make zynq_zc702_config + $ export DEVICE_TREE=zynq-zc702 + $ make xilinx_zynq_virt_defconfig $ make Bootmode |