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| author | Tom Rini <trini@konsulko.com> | 2019-06-20 21:52:31 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2019-06-20 21:52:31 -0400 |
| commit | 226a35ef0ef310d8fffa3e6283ee3aab9dab26aa (patch) | |
| tree | 22fe10155b4a590a165edaee8f5eb2b9b777b2fd /doc/device-tree-bindings/board/gdsys,board_gazerbeam.txt | |
| parent | f643fb9f4c8fc5c5dceb8c2c2893447d18413d77 (diff) | |
| parent | 2bc1821e8662f9ed67cc6eeb680148bb5c148379 (diff) | |
Merge branch '2019-06-20-master-imports'
- Assorted minor fixes
Diffstat (limited to 'doc/device-tree-bindings/board/gdsys,board_gazerbeam.txt')
| -rw-r--r-- | doc/device-tree-bindings/board/gdsys,board_gazerbeam.txt | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/doc/device-tree-bindings/board/gdsys,board_gazerbeam.txt b/doc/device-tree-bindings/board/gdsys,board_gazerbeam.txt new file mode 100644 index 0000000000..28c1080d90 --- /dev/null +++ b/doc/device-tree-bindings/board/gdsys,board_gazerbeam.txt @@ -0,0 +1,46 @@ +gdsys Gazerbeam board driver + +This driver provides capabilities to access the gdsys Gazerbeam board's device +information. Furthermore, phandles to some internal devices are provided for +the board files. + +Required properties: +- compatible: should be "gdsys,board_gazerbeam" +- csb: phandle to the board's coherent system bus (CSB) device node +- rxaui[0-3]: phandles to the rxaui control device nodes +- fpga[0-1]: phandles to the board's gdsys FPGA device nodes +- ioep[0-1]: phandles to the board's IO endpoint device nodes +- ver-gpios: GPIO list to read the hardware version from +- var-gpios: GPIO list to read the hardware variant information from +- reset-gpios: GPIO list for the board's reset GPIOs + +Example: + + +board { + compatible = "gdsys,board_gazerbeam"; + csb = <&board_soc>; + serdes = <&SERDES>; + rxaui0 = <&RXAUI0>; + rxaui1 = <&RXAUI1>; + rxaui2 = <&RXAUI2>; + rxaui3 = <&RXAUI3>; + fpga0 = <&FPGA0>; + fpga1 = <&FPGA1>; + ioep0 = <&IOEP0>; + ioep1 = <&IOEP1>; + + ver-gpios = <&PPCPCA 12 0 + &PPCPCA 13 0 + &PPCPCA 14 0 + &PPCPCA 15 0>; + + /* MC2/SC-Board */ + var-gpios-mc2 = <&GPIO_VB0 0 0 /* VAR-MC_SC */ + &GPIO_VB0 11 0>; /* VAR-CON */ + /* MC4-Board */ + var-gpios-mc4 = <&GPIO_VB1 0 0 /* VAR-MC_SC */ + &GPIO_VB1 11 0>; /* VAR-CON */ + + reset-gpios = <&gpio0 1 0 &gpio0 2 1>; +}; |