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authorPatrick Delaunay <patrick.delaunay@st.com>2020-03-06 11:14:11 +0100
committerPatrick Delaunay <patrick.delaunay@st.com>2020-03-24 14:23:30 +0100
commit9368bdfebde16368cdb642adbb12f9c871c94d63 (patch)
treebe96059207e9e0623c9007b8b1ca1d2a5b82b2ea /doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt
parentd424e6786f637d3181ffa9e2cc9ed6bca00aa30f (diff)
ram: stm32mp1: the property st, phy-cal becomes optional
This parameter "st,phy-cal" becomes optional and when it is absent the built-in PHY calibration is done. It is the case in the helper dtsi file "stm32mp15-ddr.dtsi" except if DDR_PHY_CAL_SKIP is defined. This patch also impact the ddr interactive mode - the registers of the param 'phy.cal' are initialized to 0 when "st,phy-cal" is not present in device tree (default behavior when DDR_PHY_CAL_SKIP is not activated) - the info 'cal' field can be use to change the calibration behavior - cal=1 => use param phy.cal to initialize the PHY, built-in training is skipped - cal=0 => param phy.cal is absent, built-in training is used (default) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Acked-by: Patrice Chotard <patrice.chotard@st.com>
Diffstat (limited to 'doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt')
-rw-r--r--doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt2
1 files changed, 2 insertions, 0 deletions
diff --git a/doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt b/doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt
index ee708ce92c..ac6a7df432 100644
--- a/doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt
+++ b/doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt
@@ -129,6 +129,8 @@ phyc attributes:
MR3
- st,phy-cal : phy cal depending of calibration or tuning of DDR
+ This parameter is optional; when it is absent the built-in PHY
+ calibration is done.
for STM32MP15x: 12 values are requested in this order
DX0DLLCR
DX0DQTR