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author | Sean Anderson <seanga2@gmail.com> | 2020-06-24 06:41:14 -0400 |
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committer | Andes <uboot@andestech.com> | 2020-07-01 15:01:21 +0800 |
commit | 038b13ee8134ba755a323732f3b2b838b9dc17a4 (patch) | |
tree | feb3172998423931aa0bc4726a6d882d6721863b /doc | |
parent | 082faeb86526b41bb9c5ca8373168e12f2de3a10 (diff) |
reset: Add generic reset driver
This patch adds a generic reset driver. It is designed to be useful when
one has a register in a regmap which contains bits that reset other
devices. I thought this seemed like a very generic use, so here is a
generic driver. The overall structure has been modeled on the syscon-reboot
driver.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'doc')
-rw-r--r-- | doc/device-tree-bindings/reset/syscon-reset.txt | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/doc/device-tree-bindings/reset/syscon-reset.txt b/doc/device-tree-bindings/reset/syscon-reset.txt new file mode 100644 index 0000000000..f136b3d225 --- /dev/null +++ b/doc/device-tree-bindings/reset/syscon-reset.txt @@ -0,0 +1,36 @@ +Generic SYSCON mapped register reset driver + +This is a generic reset driver using syscon to map the reset register. +The reset is generally performed with a write to the reset register +defined by the register map pointed by syscon reference plus the offset and +shifted by the reset specifier/ + +To assert a reset on some device, the equivalent of the following operation is +performed, where reset_id is the reset specifier from the device's resets +property. + + if (BIT(reset_id) & mask) + regmap[offset][reset_id] = assert-high; + +Required properties: +- compatible: should contain "syscon-reset" +- #reset-cells: must be 1 +- regmap: this is phandle to the register map node +- offset: offset in the register map for the reboot register (in bytes) + +Optional properties: +- mask: accept only the reset specifiers defined by the mask (32 bit) +- assert-high: Bit to write when asserting a reset. Defaults to 1. + +Default will be little endian mode, 32 bit access only. + +Example: + + reset-controller { + compatible = "syscon-reset"; + #reset-cells = <1>; + regmap = <&sysctl>; + offset = <0x20>; + mask = <0x27FFFFFF>; + assert-high = <0>; + }; |