diff options
author | Purna Chandra Mandal <purna.mandal@microchip.com> | 2016-01-28 15:30:11 +0530 |
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committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2016-02-01 22:14:00 +0100 |
commit | a0e7908326b9dcde4c27dbbcbc52ccbf9e009255 (patch) | |
tree | fd9dec9f395fa000b97d83369a651ce0563aded4 /doc | |
parent | 32c1a6eef8b467bb776f989caf0480fce6218598 (diff) |
drivers: clk: Add clock driver for Microchip PIC32 Microcontroller.
PIC32 clock module consists of multiple oscillators, PLLs, mutiplexers
and dividers capable of supplying clock to various controllers
on or off-chip.
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Diffstat (limited to 'doc')
-rw-r--r-- | doc/device-tree-bindings/clock/microchip,pic32-clock.txt | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/doc/device-tree-bindings/clock/microchip,pic32-clock.txt b/doc/device-tree-bindings/clock/microchip,pic32-clock.txt new file mode 100644 index 0000000000..f185ce0ae1 --- /dev/null +++ b/doc/device-tree-bindings/clock/microchip,pic32-clock.txt @@ -0,0 +1,33 @@ +* Microchip PIC32 Clock and Oscillator + +Microchip PIC32 clock tree consists of few oscillators, PLLs, +multiplexers and few divider modules capable of supplying clocks +to various controllers within SoC and also to off-chip. + +PIC32 clock controller output is defined by indices as defined +in [0] + +[0] include/dt-bindings/clock/microchip,clock.h + +Required Properties: +- compatible: should be "microchip,pic32mzda_clk" +- reg: physical base address of the controller and length of memory mapped + region. +- #clock-cells: should be 1. + +Example: Clock controller node: + + clock: clk@1f801200 { + compatible = "microchip,pic32mzda-clk"; + reg = <0x1f801200 0x1000>; + }; + +Example: UART controller node that consumes the clock generated by the clock +controller: + + uart1: serial@1f822000 { + compatible = "microchip,pic32mzda-uart"; + reg = <0xbf822000 0x50>; + interrupts = <112 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock PB2CLK>; + }; |