diff options
| author | Bin Meng <bmeng.cn@gmail.com> | 2019-07-18 00:34:11 -0700 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2019-07-24 10:07:24 -0400 |
| commit | c9bfc02a4a9a9649a36793309bc54f9751dffb12 (patch) | |
| tree | f61a0b576bd7a67b82cf2ac8ac82620bf0006c2d /doc | |
| parent | f0312aeea3d339012425b0edf89254869dd526e2 (diff) | |
doc: board: Add Google Chromebook Link board doc
This extracts Google Chromebook Link board specific information from
README.x86, converts plain text documentation to reST format and
adds it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'doc')
| -rw-r--r-- | doc/README.x86 | 31 | ||||
| -rw-r--r-- | doc/board/google/chromebook_link.rst | 34 | ||||
| -rw-r--r-- | doc/board/google/index.rst | 9 | ||||
| -rw-r--r-- | doc/board/index.rst | 1 |
4 files changed, 44 insertions, 31 deletions
diff --git a/doc/README.x86 b/doc/README.x86 index e72f840678..a8ad95604a 100644 --- a/doc/README.x86 +++ b/doc/README.x86 @@ -65,37 +65,6 @@ Both tell the Makefile to build u-boot.rom as a target. --- -Chromebook Link specific instructions for bare mode: - -First, you need the following binary blobs: - -* descriptor.bin - Intel flash descriptor -* me.bin - Intel Management Engine -* mrc.bin - Memory Reference Code, which sets up SDRAM -* video ROM - sets up the display - -You can get these binary blobs by: - -$ git clone http://review.coreboot.org/p/blobs.git -$ cd blobs - -Find the following files: - -* ./mainboard/google/link/descriptor.bin -* ./mainboard/google/link/me.bin -* ./northbridge/intel/sandybridge/systemagent-r6.bin - -The 3rd one should be renamed to mrc.bin. -As for the video ROM, you can get it here [3] and rename it to vga.bin. -Make sure all these binary blobs are put in the board directory. - -Now you can build U-Boot and obtain u-boot.rom: - -$ make chromebook_link_defconfig -$ make all - ---- - Chromebook Samus (2015 Pixel) instructions for bare mode: First, you need the following binary blobs: diff --git a/doc/board/google/chromebook_link.rst b/doc/board/google/chromebook_link.rst new file mode 100644 index 0000000000..16080304d6 --- /dev/null +++ b/doc/board/google/chromebook_link.rst @@ -0,0 +1,34 @@ +.. SPDX-License-Identifier: GPL-2.0+ +.. sectionauthor:: Simon Glass <sjg@chromium.org> + +Chromebook Link +=============== + +First, you need the following binary blobs: + + * descriptor.bin - Intel flash descriptor + * me.bin - Intel Management Engine + * mrc.bin - Memory Reference Code, which sets up SDRAM + * video ROM - sets up the display + +You can get these binary blobs by:: + + $ git clone http://review.coreboot.org/p/blobs.git + $ cd blobs + +Find the following files: + + * ./mainboard/google/link/descriptor.bin + * ./mainboard/google/link/me.bin + * ./northbridge/intel/sandybridge/systemagent-r6.bin + +The 3rd one should be renamed to mrc.bin. +As for the video ROM, you can get it `here`_ and rename it to vga.bin. +Make sure all these binary blobs are put in the board directory. + +Now you can build U-Boot and obtain u-boot.rom:: + + $ make chromebook_link_defconfig + $ make all + +.. _here: http://www.coreboot.org/~stepan/pci8086,0166.rom diff --git a/doc/board/google/index.rst b/doc/board/google/index.rst new file mode 100644 index 0000000000..93833c5f39 --- /dev/null +++ b/doc/board/google/index.rst @@ -0,0 +1,9 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Google +====== + +.. toctree:: + :maxdepth: 2 + + chromebook_link diff --git a/doc/board/index.rst b/doc/board/index.rst index 99b5d2f46a..59f745d7e5 100644 --- a/doc/board/index.rst +++ b/doc/board/index.rst @@ -6,4 +6,5 @@ Board-specific doc .. toctree:: :maxdepth: 2 + google/index intel/index |