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authorHeinrich Schuchardt <xypron.glpk@gmx.de>2020-07-09 08:12:06 +0200
committerTom Rini <trini@konsulko.com>2020-07-17 10:47:19 -0400
commitdd43272be1504f21cefde7a182cfe528c29b33d1 (patch)
treea8907d06718639badd08c2a627c1e3cf721219a6 /doc
parent76ae74d348a05c8c9deb718368a69ba05afd9784 (diff)
doc: correct description of crash dumps
Correct the description of the ESR register. Fix a typo. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Diffstat (limited to 'doc')
-rw-r--r--doc/develop/crash_dumps.rst8
1 files changed, 5 insertions, 3 deletions
diff --git a/doc/develop/crash_dumps.rst b/doc/develop/crash_dumps.rst
index 18696372fc..85030b4e36 100644
--- a/doc/develop/crash_dumps.rst
+++ b/doc/develop/crash_dumps.rst
@@ -5,7 +5,7 @@ Analyzing crash dumps
=====================
When the CPU detects an instruction that it cannot execute it raises an
-interrupt. U-Boot than writes a crash dump. This chapter describes how such
+interrupt. U-Boot then writes a crash dump. This chapter describes how such
dump can be analyzed.
Creating a crash dump voluntarily
@@ -46,8 +46,10 @@ QEMU::
resetting ...
The first line provides us with the type of interrupt that occurred.
-(On ARMv8 a synchronous abort is an exception where the return address stored
-in the ESR register indicates the instruction that caused the exception.)
+On ARMv8 a synchronous abort is an exception thrown when hitting an unallocated
+instruction. The exception syndrome register ESR register contains information
+describing the reason for the exception. Bit 25 set here indicates that a 32 bit
+instruction led to the exception.
The second line provides the contents of the elr and the lr register after
subtracting the relocation offset. - U-Boot relocates itself after being