diff options
author | Baruch Siach <baruch@tkos.co.il> | 2018-10-15 13:16:48 +0300 |
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committer | Joe Hershberger <joe.hershberger@ni.com> | 2018-10-24 14:45:38 -0500 |
commit | 18593fa80b64801768be5657a3b41ef4533a9fc9 (patch) | |
tree | 27eab30595e093bb2ea688fa23eff8e65ff5520b /drivers/ata/dwc_ahsata.c | |
parent | fa14027d5c54e6715d2df9526bc951df7ffc78e7 (diff) |
net: mvpp2: increase PHY reset pulse
The default Linux PHY reset delay is 10ms. This is also the requirement
for Marvell 88E151x PHYs, which are likely to be used with this Ethernet
MAC.
Cc: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'drivers/ata/dwc_ahsata.c')
0 files changed, 0 insertions, 0 deletions