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| author | Ian Ray <ian.ray@ge.com> | 2018-10-15 09:59:44 +0200 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2018-10-22 14:32:07 +0200 |
| commit | d9ea0d77a8ff2d0522313aa1bb65ee955e252c93 (patch) | |
| tree | 5794ea461b0c07477a6409dbb8d259627808b87e /drivers/ata/sata_sil3114.c | |
| parent | 6ee7bb528eacbba9629e44b8123becb9076b9308 (diff) | |
board: ge: bx50v3: correct LDB clock
Use Video PLL to provide 65MHz for all displays.
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.com>
Diffstat (limited to 'drivers/ata/sata_sil3114.c')
0 files changed, 0 insertions, 0 deletions