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authorMarek Vasut <marex@denx.de>2018-08-06 22:07:40 +0200
committerMarek Vasut <marex@denx.de>2018-08-13 22:35:42 +0200
commitccc97432adf50156da86132ad75e3a99c9c0d3eb (patch)
tree0677a1998c4697e1662fc7ec28ffb87fcb39482f /drivers/clk/Makefile
parentf4c3e0dcf5be525b7db3c46f1dd111663181a03a (diff)
ARM: dts: socfpga: Add u-boot,dm-pre-reloc to necessary clock nodes
Add the pre-reloc DT markers to clock nodes needed in SPL and early U-Boot stages. This is required to let the Arria10 clock driver start early and provide clock information for UART and SDMMC. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Diffstat (limited to 'drivers/clk/Makefile')
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