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| author | Philipp Tomsich <philipp.tomsich@theobroma-systems.com> | 2019-02-03 16:17:28 +0100 |
|---|---|---|
| committer | Philipp Tomsich <philipp.tomsich@theobroma-systems.com> | 2019-05-01 00:00:04 +0200 |
| commit | e647decdd93c7408741329432f26758fbec04c7a (patch) | |
| tree | 0f32b9283093ab28e599126c3ac8815b0d220d97 /drivers/clk/clk-hsdk-cgu.c | |
| parent | 0e661b6df0aedf82be8a59433e68482df166566e (diff) | |
rockchip: spi: fix off-by-one in chunk size computation
The maximum transfer length (in a single transaction) for the Rockchip
SPI controller is 64Kframes (i.e. 0x10000 frames) of 8bit or 16bit
frames and is encoded as (num_frames - 1) in CTRLR1. The existing
code subtracted the "minus 1" twice for a maximum transfer length of
0xffff (64K - 1) frames.
While this is not strictly an error (the existing code is correct, but
leads to a bit of head-scrating), fix this off-by-one situation.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Diffstat (limited to 'drivers/clk/clk-hsdk-cgu.c')
0 files changed, 0 insertions, 0 deletions