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authorTom Rini <trini@konsulko.com>2020-07-07 22:58:18 -0400
committerTom Rini <trini@konsulko.com>2020-07-07 22:58:18 -0400
commit0b59138690a93f3d880be3d5aa675f7219376e58 (patch)
treeb139bf8d951a50c2196f3f36dc2f5ab2f3bb1cc7 /drivers/clk/owl/clk_owl.c
parent1e88e78177da80fa8e9fa9fc7613657478d61d1e (diff)
parent9b9f10e3ccded02443162980d34be517886b0645 (diff)
Merge branch '2020-07-07-misc-new-features'
- Improve s700 SoC support - Fix building with clang on ARM. - Juno platform updates - fs/dm cmd improvements - Other assorted improvements / fixes
Diffstat (limited to 'drivers/clk/owl/clk_owl.c')
-rw-r--r--drivers/clk/owl/clk_owl.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/clk/owl/clk_owl.c b/drivers/clk/owl/clk_owl.c
index 9715fce162..1999c87a33 100644
--- a/drivers/clk/owl/clk_owl.c
+++ b/drivers/clk/owl/clk_owl.c
@@ -87,6 +87,11 @@ int owl_clk_enable(struct clk *clk)
/* Enable UART3 interface clock */
setbits_le32(priv->base + CMU_DEVCLKEN1, CMU_DEVCLKEN1_UART3);
break;
+ case CLK_RMII_REF:
+ case CLK_ETHERNET:
+ setbits_le32(priv->base + CMU_DEVCLKEN1, CMU_DEVCLKEN1_ETH);
+ setbits_le32(priv->base + CMU_ETHERNETPLL, 5);
+ break;
default:
return -EINVAL;
}
@@ -112,6 +117,10 @@ int owl_clk_disable(struct clk *clk)
/* Disable UART3 interface clock */
clrbits_le32(priv->base + CMU_DEVCLKEN1, CMU_DEVCLKEN1_UART3);
break;
+ case CLK_RMII_REF:
+ case CLK_ETHERNET:
+ clrbits_le32(priv->base + CMU_DEVCLKEN1, CMU_DEVCLKEN1_ETH);
+ break;
default:
return -EINVAL;
}