diff options
author | Marek Vasut <marek.vasut+renesas@gmail.com> | 2019-03-04 13:36:13 +0100 |
---|---|---|
committer | Marek Vasut <marex@denx.de> | 2019-04-09 18:19:10 +0200 |
commit | 933143997b9a48f27549f3387676e9d7e4607815 (patch) | |
tree | e9ff2a48ef2bf72c060713fb31238f2d7ebbb71b /drivers/clk/renesas/r8a7796-cpg-mssr.c | |
parent | ce417a2f23fcd4ae19d3ed070b93f274fb20b22d (diff) |
clk: renesas: Add R8A77965 clock tables
Add clock tables for R8A77965 from Linux 5.0 , except for the
crit, R and Z clock, which are neither used nor supported by
the U-Boot clock framework yet.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'drivers/clk/renesas/r8a7796-cpg-mssr.c')
-rw-r--r-- | drivers/clk/renesas/r8a7796-cpg-mssr.c | 19 |
1 files changed, 0 insertions, 19 deletions
diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c index 8115c65eb9..190a070f7d 100644 --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c @@ -322,30 +322,11 @@ static const struct cpg_mssr_info r8a7796_cpg_mssr_info = { .get_pll_config = r8a7796_get_pll_config, }; -static const struct cpg_mssr_info r8a77965_cpg_mssr_info = { - .core_clk = r8a7796_core_clks, - .core_clk_size = ARRAY_SIZE(r8a7796_core_clks), - .mod_clk = r8a7796_mod_clks, - .mod_clk_size = ARRAY_SIZE(r8a7796_mod_clks), - .mstp_table = r8a7796_mstp_table, - .mstp_table_size = ARRAY_SIZE(r8a7796_mstp_table), - .reset_node = "renesas,r8a77965-rst", - .extalr_node = "extalr", - .mod_clk_base = MOD_CLK_BASE, - .clk_extal_id = CLK_EXTAL, - .clk_extalr_id = CLK_EXTALR, - .get_pll_config = r8a7796_get_pll_config, -}; - static const struct udevice_id r8a7796_clk_ids[] = { { .compatible = "renesas,r8a7796-cpg-mssr", .data = (ulong)&r8a7796_cpg_mssr_info, }, - { - .compatible = "renesas,r8a77965-cpg-mssr", - .data = (ulong)&r8a77965_cpg_mssr_info, - }, { } }; |