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authorTom Rini <trini@konsulko.com>2016-11-02 09:41:20 -0400
committerTom Rini <trini@konsulko.com>2016-11-02 09:41:20 -0400
commit7fd117389ec7bbd0ce2fbb98ce47c20f5b8a0cfb (patch)
treee3cac6c8365b63bfa1e5251eebec7f1bf68ac098 /drivers/clk/rockchip
parentd8bdfc80da39211d95f10d24e79f2e867305f71b (diff)
parent4594ac07847f5c7fe7294ce6c71849fea0a431e0 (diff)
Merge git://git.denx.de/u-boot-rockchip
Diffstat (limited to 'drivers/clk/rockchip')
-rw-r--r--drivers/clk/rockchip/clk_rk3036.c24
-rw-r--r--drivers/clk/rockchip/clk_rk3288.c21
-rw-r--r--drivers/clk/rockchip/clk_rk3399.c24
3 files changed, 2 insertions, 67 deletions
diff --git a/drivers/clk/rockchip/clk_rk3036.c b/drivers/clk/rockchip/clk_rk3036.c
index 8899b0c62d..7e3bf96944 100644
--- a/drivers/clk/rockchip/clk_rk3036.c
+++ b/drivers/clk/rockchip/clk_rk3036.c
@@ -19,11 +19,6 @@
DECLARE_GLOBAL_DATA_PTR;
-struct rk3036_clk_priv {
- struct rk3036_cru *cru;
- ulong rate;
-};
-
enum {
VCO_MAX_HZ = 2400U * 1000000,
VCO_MIN_HZ = 600 * 1000000,
@@ -49,23 +44,6 @@ enum {
static const struct pll_div apll_init_cfg = PLL_DIVISORS(APLL_HZ, 1, 3, 1);
static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2, 1);
-void *rockchip_get_cru(void)
-{
- struct udevice *dev;
- fdt_addr_t addr;
- int ret;
-
- ret = uclass_get_device(UCLASS_CLK, 0, &dev);
- if (ret)
- return ERR_PTR(ret);
-
- addr = dev_get_addr(dev);
- if (addr == FDT_ADDR_T_NONE)
- return ERR_PTR(-EINVAL);
-
- return (void *)addr;
-}
-
static int rkclk_set_pll(struct rk3036_cru *cru, enum rk_clk_id clk_id,
const struct pll_div *div)
{
@@ -371,7 +349,7 @@ static const struct udevice_id rk3036_clk_ids[] = {
{ }
};
-U_BOOT_DRIVER(clk_rk3036) = {
+U_BOOT_DRIVER(rockchip_rk3036_cru) = {
.name = "clk_rk3036",
.id = UCLASS_CLK,
.of_match = rk3036_clk_ids,
diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index bd71a96927..ed97e87a95 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -30,12 +30,6 @@ struct rk3288_clk_plat {
#endif
};
-struct rk3288_clk_priv {
- struct rk3288_grf *grf;
- struct rk3288_cru *cru;
- ulong rate;
-};
-
struct pll_div {
u32 nr;
u32 nf;
@@ -140,21 +134,6 @@ static const struct pll_div apll_init_cfg = PLL_DIVISORS(APLL_HZ, 1, 1);
static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2);
static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 2);
-void *rockchip_get_cru(void)
-{
- struct rk3288_clk_priv *priv;
- struct udevice *dev;
- int ret;
-
- ret = rockchip_get_clk(&dev);
- if (ret)
- return ERR_PTR(ret);
-
- priv = dev_get_priv(dev);
-
- return priv->cru;
-}
-
static int rkclk_set_pll(struct rk3288_cru *cru, enum rk_clk_id clk_id,
const struct pll_div *div)
{
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index ea0ce2aab1..2e87e4b62d 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -18,11 +18,6 @@
DECLARE_GLOBAL_DATA_PTR;
-struct rk3399_clk_priv {
- struct rk3399_cru *cru;
- ulong rate;
-};
-
struct rk3399_pmuclk_priv {
struct rk3399_pmucru *pmucru;
};
@@ -780,23 +775,6 @@ static struct clk_ops rk3399_clk_ops = {
.set_rate = rk3399_clk_set_rate,
};
-void *rockchip_get_cru(void)
-{
- struct udevice *dev;
- fdt_addr_t *addr;
- int ret;
-
- ret = uclass_get_device_by_name(UCLASS_CLK, "clk_rk3399", &dev);
- if (ret)
- return ERR_PTR(ret);
-
- addr = dev_get_addr_ptr(dev);
- if ((fdt_addr_t)addr == FDT_ADDR_T_NONE)
- return ERR_PTR(-EINVAL);
-
- return addr;
-}
-
static int rk3399_clk_probe(struct udevice *dev)
{
struct rk3399_clk_priv *priv = dev_get_priv(dev);
@@ -990,7 +968,7 @@ static const struct udevice_id rk3399_pmuclk_ids[] = {
{ }
};
-U_BOOT_DRIVER(pmuclk_rk3399) = {
+U_BOOT_DRIVER(rockchip_rk3399_pmuclk) = {
.name = "pmuclk_rk3399",
.id = UCLASS_CLK,
.of_match = rk3399_pmuclk_ids,