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authorAnup Patel <Anup.Patel@wdc.com>2019-06-25 06:31:02 +0000
committerAndes <uboot@andestech.com>2019-07-19 14:24:51 +0800
commitd04c79d2b238e857c1b1f45a78d173152792b371 (patch)
treefada51871af3e67dabd9e880d183ba295ca5c8fe /drivers/clk/sifive/fu540-prci.c
parent0de815356474912ef5bef9a69f0327a5a93bb2c2 (diff)
clk: sifive: Factor-out PLL library as separate module
To match SiFive clock driver with latest Linux, we factor-out PLL library as separate module under drivers/clk/analogbits. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'drivers/clk/sifive/fu540-prci.c')
-rw-r--r--drivers/clk/sifive/fu540-prci.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/clk/sifive/fu540-prci.c b/drivers/clk/sifive/fu540-prci.c
index 2d47ebc6b1..56084db2e6 100644
--- a/drivers/clk/sifive/fu540-prci.c
+++ b/drivers/clk/sifive/fu540-prci.c
@@ -37,10 +37,9 @@
#include <errno.h>
#include <linux/math64.h>
+#include <linux/clk/analogbits-wrpll-cln28hpc.h>
#include <dt-bindings/clk/sifive-fu540-prci.h>
-#include "analogbits-wrpll-cln28hpc.h"
-
/*
* EXPECTED_CLK_PARENT_COUNT: how many parent clocks this driver expects:
* hfclk and rtcclk