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authorJagan Teki <jagan@amarulasolutions.com>2019-01-11 15:41:46 +0530
committerJagan Teki <jagan@amarulasolutions.com>2019-01-18 22:19:09 +0530
commit6901aab8e35183115ae65362f3af0ea095b6c1b8 (patch)
tree771d46ec8bbb1700ff392289d9a3b2fef9fd4b6e /drivers/clk/sunxi/Makefile
parent8dcc7e69224f898272dbbbba2d9a1c5efaa28304 (diff)
clk: sunxi: Add Allwinner A80 CLK driver
Add initial clock driver for Allwinner A80. - Implement UART bus clocks via ccu_clk_gate table for A80, so it can accessed in common clk enable and disable functions from clk_sunxi.c - Implement UART bus resets via ccu_reset table for A80, so it can accessed in common reset deassert and assert functions from reset-sunxi.c Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Diffstat (limited to 'drivers/clk/sunxi/Makefile')
-rw-r--r--drivers/clk/sunxi/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile
index 794aa2461c..36fb2aeb56 100644
--- a/drivers/clk/sunxi/Makefile
+++ b/drivers/clk/sunxi/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_CLK_SUN8I_A23) += clk_a23.o
obj-$(CONFIG_CLK_SUN8I_A83T) += clk_a83t.o
obj-$(CONFIG_CLK_SUN8I_R40) += clk_r40.o
obj-$(CONFIG_CLK_SUN8I_V3S) += clk_v3s.o
+obj-$(CONFIG_CLK_SUN9I_A80) += clk_a80.o
obj-$(CONFIG_CLK_SUN8I_H3) += clk_h3.o
obj-$(CONFIG_CLK_SUN50I_H6) += clk_h6.o
obj-$(CONFIG_CLK_SUN50I_A64) += clk_a64.o