summaryrefslogtreecommitdiff
path: root/drivers/clk/sunxi/clk_h6.c
diff options
context:
space:
mode:
authorJagan Teki <jagan@amarulasolutions.com>2018-12-31 15:35:01 +0530
committerJagan Teki <jagan@amarulasolutions.com>2019-01-18 22:19:09 +0530
commit337fcdc06bad484d3af08e0fd0876e22a09358ce (patch)
treedf491f67132d0a4ac89e6e71bebf9237098b0440 /drivers/clk/sunxi/clk_h6.c
parent8606f960d4e40f1fbd7fb7e1be30c924dbb9dba0 (diff)
clk: sunxi: Add Allwinner H6 CLK driver
Add initial clock driver for Allwinner H6. - Implement UART bus clocks via ccu_clk_gate table for H6, so it can accessed in common clk enable and disable functions from clk_sunxi.c - Implement UART bus resets via ccu_reset table for H6, so it can accessed in common reset deassert and assert functions from reset-sunxi.c Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Diffstat (limited to 'drivers/clk/sunxi/clk_h6.c')
-rw-r--r--drivers/clk/sunxi/clk_h6.c53
1 files changed, 53 insertions, 0 deletions
diff --git a/drivers/clk/sunxi/clk_h6.c b/drivers/clk/sunxi/clk_h6.c
new file mode 100644
index 0000000000..0da3a40e3d
--- /dev/null
+++ b/drivers/clk/sunxi/clk_h6.c
@@ -0,0 +1,53 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2018 Amarula Solutions.
+ * Author: Jagan Teki <jagan@amarulasolutions.com>
+ */
+
+#include <common.h>
+#include <clk-uclass.h>
+#include <dm.h>
+#include <errno.h>
+#include <asm/arch/ccu.h>
+#include <dt-bindings/clock/sun50i-h6-ccu.h>
+#include <dt-bindings/reset/sun50i-h6-ccu.h>
+
+static struct ccu_clk_gate h6_gates[] = {
+ [CLK_BUS_UART0] = GATE(0x90c, BIT(0)),
+ [CLK_BUS_UART1] = GATE(0x90c, BIT(1)),
+ [CLK_BUS_UART2] = GATE(0x90c, BIT(2)),
+ [CLK_BUS_UART3] = GATE(0x90c, BIT(3)),
+};
+
+static struct ccu_reset h6_resets[] = {
+ [RST_BUS_UART0] = RESET(0x90c, BIT(16)),
+ [RST_BUS_UART1] = RESET(0x90c, BIT(17)),
+ [RST_BUS_UART2] = RESET(0x90c, BIT(18)),
+ [RST_BUS_UART3] = RESET(0x90c, BIT(19)),
+};
+
+static const struct ccu_desc h6_ccu_desc = {
+ .gates = h6_gates,
+ .resets = h6_resets,
+};
+
+static int h6_clk_bind(struct udevice *dev)
+{
+ return sunxi_reset_bind(dev, ARRAY_SIZE(h6_resets));
+}
+
+static const struct udevice_id h6_ccu_ids[] = {
+ { .compatible = "allwinner,sun50i-h6-ccu",
+ .data = (ulong)&h6_ccu_desc },
+ { }
+};
+
+U_BOOT_DRIVER(clk_sun50i_h6) = {
+ .name = "sun50i_h6_ccu",
+ .id = UCLASS_CLK,
+ .of_match = h6_ccu_ids,
+ .priv_auto_alloc_size = sizeof(struct ccu_priv),
+ .ops = &sunxi_clk_ops,
+ .probe = sunxi_clk_probe,
+ .bind = h6_clk_bind,
+};