diff options
author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-10-13 19:22:00 +0900 |
---|---|---|
committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-10-15 22:32:25 +0900 |
commit | ab05406e73284e194ceffb956d9bcd957b6c8c00 (patch) | |
tree | 5d707d0d8c1eab0cc783b09bf15c593431f0d91d /drivers/clk/uniphier/clk-uniphier-sys.c | |
parent | d6c7ee7d281e1bace42d5981b35a98322b994bc1 (diff) |
clk: uniphier: add PXs3 clock data
Add basic clock data for Socionext's new SoC PXs3.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'drivers/clk/uniphier/clk-uniphier-sys.c')
-rw-r--r-- | drivers/clk/uniphier/clk-uniphier-sys.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/clk/uniphier/clk-uniphier-sys.c b/drivers/clk/uniphier/clk-uniphier-sys.c index e9df88508c..f8cf6daa8d 100644 --- a/drivers/clk/uniphier/clk-uniphier-sys.c +++ b/drivers/clk/uniphier/clk-uniphier-sys.c @@ -30,3 +30,17 @@ const struct uniphier_clk_data uniphier_ld20_sys_clk_data[] = { { /* sentinel */ } #endif }; + +const struct uniphier_clk_data uniphier_pxs3_sys_clk_data[] = { +#if defined(CONFIG_ARCH_UNIPHIER_PXS3) + UNIPHIER_CLK_GATE_SIMPLE(12, 0x210c, 4), /* usb30 (gio0) */ + UNIPHIER_CLK_GATE_SIMPLE(13, 0x210c, 5), /* usb31-0 (gio1) */ + UNIPHIER_CLK_GATE_SIMPLE(14, 0x210c, 6), /* usb31-1 (gio1-1) */ + UNIPHIER_CLK_GATE_SIMPLE(16, 0x210c, 16), /* usb30-phy0 */ + UNIPHIER_CLK_GATE_SIMPLE(17, 0x210c, 18), /* usb30-phy1 */ + UNIPHIER_CLK_GATE_SIMPLE(18, 0x210c, 20), /* usb30-phy2 */ + UNIPHIER_CLK_GATE_SIMPLE(20, 0x210c, 17), /* usb31-phy0 */ + UNIPHIER_CLK_GATE_SIMPLE(21, 0x210c, 19), /* usb31-phy1 */ + { /* sentinel */ } +#endif +}; |