clk: uniphier: add Media I/O clock driver for UniPhier SoCs

This is the initial commit for the UniPhier clock drivers.
Currently, only the Media I/O clock is supported.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

1 files changed, 57 insertions, 0 deletions

diff --git a/drivers/clk/uniphier/clk-uniphier.h b/drivers/clk/uniphier/clk-uniphier.h
new file mode 100644
index 0000000000..560b3f8112
--- /dev/null
+++ b/drivers/clk/uniphier/clk-uniphier.h
@@ -0,0 +1,57 @@
+/*
+ * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CLK_UNIPHIER_H__
+#define __CLK_UNIPHIER_H__
+
+#include <linux/kernel.h>
+
+struct uniphier_clk_gate_data {
+	int index;
+	unsigned int reg;
+	u32 mask;
+	u32 data;
+};
+
+struct uniphier_clk_rate_data {
+	int index;
+	unsigned int reg;
+#define UNIPHIER_CLK_RATE_IS_FIXED		UINT_MAX
+	u32 mask;
+	u32 data;
+	unsigned long rate;
+};
+
+struct uniphier_clk_soc_data {
+	struct uniphier_clk_gate_data *gate;
+	unsigned int nr_gate;
+	struct uniphier_clk_rate_data *rate;
+	unsigned int nr_rate;
+};
+
+#define UNIPHIER_CLK_FIXED_RATE(i, f)			\
+	{						\
+		.index = i,				\
+		.reg = UNIPHIER_CLK_RATE_IS_FIXED,	\
+		.rate = f,				\
+	}
+
+/**
+ * struct uniphier_clk_priv - private data for UniPhier clock driver
+ *
+ * @base: base address of the clock provider
+ * @socdata: SoC specific data
+ */
+struct uniphier_clk_priv {
+	void __iomem *base;
+	struct uniphier_clk_soc_data *socdata;
+};
+
+extern const struct clk_ops uniphier_clk_ops;
+int uniphier_clk_probe(struct udevice *dev);
+int uniphier_clk_remove(struct udevice *dev);
+
+#endif /* __CLK_UNIPHIER_H__ */