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authorPatrice Chotard <patrice.chotard@st.com>2018-01-29 18:14:14 +0100
committerTom Rini <trini@konsulko.com>2018-01-29 12:48:33 -0500
commit05e23dd489685c99be4ff4fe1c41543a3688dceb (patch)
treec05842894508902d890263ab6304bc65ad532509 /drivers/clk
parenta70c05f10a7f02be7f9edd31f35058b098313820 (diff)
clk: clk_stm32: Add .set_rate callback
Since 'commit f4fcba5c5baa ("clk: implement clk_set_defaults()")' STM32F4 family board can't boot. Above patch calls clk_set_rate() for all nodes with assigned-clock-rates property. Clock driver for STM32F family doesn't implement .set_rate callback which make clk_set_defaults() exit on error and prevent board to boot. Fixes: f4fcba5c5baa ("clk: implement clk_set_defaults()") Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/clk_stm32f.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/clk/clk_stm32f.c b/drivers/clk/clk_stm32f.c
index 06827fec75..926b249ff3 100644
--- a/drivers/clk/clk_stm32f.c
+++ b/drivers/clk/clk_stm32f.c
@@ -337,6 +337,11 @@ static unsigned long stm32_clk_get_rate(struct clk *clk)
}
}
+static ulong stm32_set_rate(struct clk *clk, ulong rate)
+{
+ return 0;
+}
+
static int stm32_clk_enable(struct clk *clk)
{
struct stm32_clk *priv = dev_get_priv(clk->dev);
@@ -464,6 +469,7 @@ static struct clk_ops stm32_clk_ops = {
.of_xlate = stm32_clk_of_xlate,
.enable = stm32_clk_enable,
.get_rate = stm32_clk_get_rate,
+ .set_rate = stm32_set_rate,
};
U_BOOT_DRIVER(stm32fx_clk) = {