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| author | Tom Rini <trini@konsulko.com> | 2020-08-20 14:46:43 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2020-08-20 14:46:43 -0400 |
| commit | 2e6132d835631946b7a67dedd8f5bc902304b0f9 (patch) | |
| tree | 5f2a36b99365328bb2b5003d6059de1c74f536d2 /drivers/clk | |
| parent | 2a4484a5c54cd64d5c4f8fd9aaa56f739d1b2b9d (diff) | |
| parent | 29af2ac48c8f910cc2efc8099323f9d619fb2bd5 (diff) | |
Merge tag 'xilinx-for-v2020.10-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2020.10-rc3
- Fix fdtfile variable setup
- Fix bootm_*/fdt_high/initrd_high variables handling
- Fix Kconfig dependencies for Xilinx drivers
- Fix booting u-boot from lowest memory
- Fix firmware payload argument count for Versal
- Fix dfu configurations
- Fix mio_bank property handling
- Fix and align code around ID detection
- Start to use ENV_VARS_UBOOT_RUNTIME_CONFIG
- Simplify logic around reading MAC from eeprom
- Decrease malloc length for zynqmp mini qspi
- Enable preboot for ZynqMP and Versal
i2c:
- Fix i2c eeprom partitions handling
mmc:
- Fix logic around HS mode enabling and use proper functions
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/clk_versal.c | 17 |
1 files changed, 0 insertions, 17 deletions
diff --git a/drivers/clk/clk_versal.c b/drivers/clk/clk_versal.c index 6f82b60f04..d93b860aed 100644 --- a/drivers/clk/clk_versal.c +++ b/drivers/clk/clk_versal.c @@ -68,23 +68,6 @@ #define CLOCK_NODE_TYPE_DIV 4 #define CLOCK_NODE_TYPE_GATE 6 -enum pm_query_id { - PM_QID_INVALID, - PM_QID_CLOCK_GET_NAME, - PM_QID_CLOCK_GET_TOPOLOGY, - PM_QID_CLOCK_GET_FIXEDFACTOR_PARAMS, - PM_QID_CLOCK_GET_PARENTS, - PM_QID_CLOCK_GET_ATTRIBUTES, - PM_QID_PINCTRL_GET_NUM_PINS, - PM_QID_PINCTRL_GET_NUM_FUNCTIONS, - PM_QID_PINCTRL_GET_NUM_FUNCTION_GROUPS, - PM_QID_PINCTRL_GET_FUNCTION_NAME, - PM_QID_PINCTRL_GET_FUNCTION_GROUPS, - PM_QID_PINCTRL_GET_PIN_GROUPS, - PM_QID_CLOCK_GET_NUM_CLOCKS, - PM_QID_CLOCK_GET_MAX_DIVISOR, -}; - enum clk_type { CLK_TYPE_OUTPUT, CLK_TYPE_EXTERNAL, |