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authorJagan Teki <jagan@amarulasolutions.com>2020-05-26 11:32:05 +0800
committerKever Yang <kever.yang@rock-chips.com>2020-05-29 18:08:49 +0800
commitf7dd12a7e7c7b22fc0515292d080e2b0dfe515e6 (patch)
treefa4e4d99eafcc8c90fe23ffdcde3c1b9408f188d /drivers/clk
parent1cf99b36263dc2ebf630caabbb535941623f4b07 (diff)
clk: rk3399: Enable/Disable the USB2PHY clk
Enable/Disable the USB2PHY clk for rk3399. CLK is clear in enable and set in disable functionality. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/rockchip/clk_rk3399.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 4caf3b5617..773d2176e6 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -1094,6 +1094,12 @@ static int rk3399_clk_enable(struct clk *clk)
case SCLK_MACREF_OUT:
rk_clrreg(&priv->cru->clkgate_con[5], BIT(6));
break;
+ case SCLK_USB2PHY0_REF:
+ rk_clrreg(&priv->cru->clkgate_con[6], BIT(5));
+ break;
+ case SCLK_USB2PHY1_REF:
+ rk_clrreg(&priv->cru->clkgate_con[6], BIT(6));
+ break;
case ACLK_GMAC:
rk_clrreg(&priv->cru->clkgate_con[32], BIT(0));
break;
@@ -1170,6 +1176,12 @@ static int rk3399_clk_disable(struct clk *clk)
case SCLK_MACREF_OUT:
rk_setreg(&priv->cru->clkgate_con[5], BIT(6));
break;
+ case SCLK_USB2PHY0_REF:
+ rk_setreg(&priv->cru->clkgate_con[6], BIT(5));
+ break;
+ case SCLK_USB2PHY1_REF:
+ rk_setreg(&priv->cru->clkgate_con[6], BIT(6));
+ break;
case ACLK_GMAC:
rk_setreg(&priv->cru->clkgate_con[32], BIT(0));
break;