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authorTom Rini <trini@konsulko.com>2019-09-02 23:21:44 -0400
committerTom Rini <trini@konsulko.com>2019-09-02 23:21:44 -0400
commit83a5df42614c566c3c642871f683e66a53d228ae (patch)
treeea53c8fd1dd9bf65bc1d29dd9a0957d060dc1917 /drivers/cpu
parentd22c8be964a870f59d2fdab6c67cefa0c4799364 (diff)
parent61ce84b2cf1a6672c8e402ce8174554b25629692 (diff)
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
- Skip unavailable hart in the get_count(). - fu540 set serial env from otp. - fu540 add mmc0 as a boot target device. - Update fix_rela_dyn and add absolute reloc addend. - Andestech PLIC driver will skip unavailable hart. - Support Andestech V5L2 cache driver.
Diffstat (limited to 'drivers/cpu')
-rw-r--r--drivers/cpu/riscv_cpu.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/cpu/riscv_cpu.c b/drivers/cpu/riscv_cpu.c
index f77c126499..28ad0aa30f 100644
--- a/drivers/cpu/riscv_cpu.c
+++ b/drivers/cpu/riscv_cpu.c
@@ -46,6 +46,10 @@ static int riscv_cpu_get_count(struct udevice *dev)
ofnode_for_each_subnode(node, dev_ofnode(dev->parent)) {
const char *device_type;
+ /* skip if hart is marked as not available in the device tree */
+ if (!ofnode_is_available(node))
+ continue;
+
device_type = ofnode_read_string(node, "device_type");
if (!device_type)
continue;