Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq

3 files changed, 108 insertions, 1 deletions

diff --git a/drivers/crypto/fsl/desc.h b/drivers/crypto/fsl/desc.h
index 18e2ec8d26..1ac3a09dff 100644
--- a/drivers/crypto/fsl/desc.h
+++ b/drivers/crypto/fsl/desc.h
@@ -436,6 +436,31 @@
 #define OP_PCLID_BLOB		(0x0d << OP_PCLID_SHIFT)
 #define OP_PCLID_SECRETKEY	(0x11 << OP_PCLID_SHIFT)
 #define OP_PCLID_PUBLICKEYPAIR	(0x14 << OP_PCLID_SHIFT)
+#define OP_PCLID_DSA_SIGN	(0x15 << OP_PCLID_SHIFT)
+#define OP_PCLID_DSA_VERIFY	(0x16 << OP_PCLID_SHIFT)
+
+/* Assuming OP_TYPE = OP_TYPE_DECAP_PROTOCOL */
+#define OP_PCLID_MP_PUB_KEY	(0x14 << OP_PCLID_SHIFT)
+#define OP_PCLID_MP_SIGN	(0x15 << OP_PCLID_SHIFT)
+
+/* Assuming OP_TYPE = OP_TYPE_ENCAP_PROTOCOL */
+#define OP_PCLID_MP_PRIV_KEY	(0x14 << OP_PCLID_SHIFT)
+
+/* PROTINFO fields for discrete log public key protocols */
+#define OP_PROTINFO_F2M_FP	0x00000001
+#define OP_PROTINFO_ECC_DL	0x00000002
+#define OP_PROTINFO_ENC_PRI	0x00000004
+#define OP_PROTINFO_TEST	0x00000008
+#define OP_PROTINFO_EXT_PRI	0x00000010
+#define OP_PROTINFO_ENC_Z	0x00000020
+#define OP_PROTINFO_EKT_Z	0x00000040
+#define OP_PROTINFO_MES_REP	0x00000400
+#define OP_PROTINFO_HASH_MD5	0x00000000
+#define OP_PROTINFO_HASH_SHA1	0x00000080
+#define OP_PROTINFO_HASH_SHA224	0x00000100
+#define OP_PROTINFO_HASH_SHA256	0x00000180
+#define OP_PROTINFO_HASH_SHA384	0x00000200
+#define OP_PROTINFO_HASH_SHA512	0x00000280
 
 /* For non-protocol/alg-only op commands */
 #define OP_ALG_TYPE_SHIFT	24
@@ -663,4 +688,59 @@
 #define OP_ALG_RNG4_MAS                (0x1f3 << OP_ALG_RNG4_SHIFT)
 #define OP_ALG_RNG4_SK         (0x100 << OP_ALG_RNG4_SHIFT)
 
+
+/* Structures for Protocol Data Blocks */
+struct __packed pdb_ecdsa_verify {
+	uint32_t pdb_hdr;
+	dma_addr_t dma_q;	/* Pointer to q (elliptic curve) */
+	dma_addr_t dma_r;	/* Pointer to r (elliptic curve) */
+	dma_addr_t dma_g_xy;	/* Pointer to Gx,y (elliptic curve) */
+	dma_addr_t dma_pkey;	/* Pointer to Wx,y (public key) */
+	dma_addr_t dma_hash;	/* Pointer to hash input */
+	dma_addr_t dma_c;	/* Pointer to C_signature */
+	dma_addr_t dma_d;	/* Pointer to D_signature */
+	dma_addr_t dma_buf;	/* Pointer to 64-byte temp buffer */
+	dma_addr_t dma_ab;	/* Pointer to a,b (elliptic curve ) */
+	uint32_t img_size;	/* Length of Message */
+};
+
+struct __packed pdb_ecdsa_sign {
+	uint32_t pdb_hdr;
+	dma_addr_t dma_q;	/* Pointer to q (elliptic curve) */
+	dma_addr_t dma_r;	/* Pointer to r (elliptic curve) */
+	dma_addr_t dma_g_xy;	/* Pointer to Gx,y (elliptic curve) */
+	dma_addr_t dma_pri_key;	/* Pointer to S (Private key) */
+	dma_addr_t dma_hash;	/* Pointer to hash input */
+	dma_addr_t dma_c;	/* Pointer to C_signature */
+	dma_addr_t dma_d;	/* Pointer to D_signature */
+	dma_addr_t dma_ab;	/* Pointer to a,b (elliptic curve ) */
+	dma_addr_t dma_u;	/* Pointer to Per Message Random */
+	uint32_t img_size;	/* Length of Message */
+};
+
+#define PDB_ECDSA_SGF_SHIFT	23
+#define PDB_ECDSA_L_SHIFT	7
+#define PDB_ECDSA_N_SHIFT	0
+
+struct __packed pdb_mp_pub_k {
+	uint32_t pdb_hdr;
+	#define PDB_MP_PUB_K_SGF_SHIFT		31
+	dma_addr_t dma_pkey;	/* Pointer to Wx,y (public key) */
+};
+
+struct __packed pdb_mp_sign {
+	uint32_t pdb_hdr;
+	#define PDB_MP_SIGN_SGF_SHIFT		28
+	dma_addr_t dma_addr_msg;	/* Pointer to Message */
+	dma_addr_t dma_addr_hash;	/* Pointer to hash output */
+	dma_addr_t dma_addr_c_sig;	/* Pointer to C_signature */
+	dma_addr_t dma_addr_d_sig;	/* Pointer to D_signature */
+	uint32_t img_size;		/* Length of Message */
+};
+
+#define PDB_MP_CSEL_SHIFT	17
+#define PDB_MP_CSEL_P256	0x3 << PDB_MP_CSEL_SHIFT	/* P-256 */
+#define PDB_MP_CSEL_P384	0x4 << PDB_MP_CSEL_SHIFT	/* P-384 */
+#define PDB_MP_CSEL_P521	0x5 << PDB_MP_CSEL_SHIFT	/* P-521 */
+
 #endif /* DESC_H */
diff --git a/drivers/crypto/fsl/desc_constr.h b/drivers/crypto/fsl/desc_constr.h
index 2559ccda8c..4ea93b03a2 100644
--- a/drivers/crypto/fsl/desc_constr.h
+++ b/drivers/crypto/fsl/desc_constr.h
@@ -53,6 +53,19 @@ union ptr_addr_t {
 };
 #endif
 
+static inline void pdb_add_ptr(dma_addr_t *offset, dma_addr_t ptr)
+{
+#ifdef CONFIG_PHYS_64BIT
+	/* The Position of low and high part of 64 bit address
+	 * will depend on the endianness of CAAM Block */
+	union ptr_addr_t *ptr_addr = (union ptr_addr_t *)offset;
+	ptr_addr->m_halfs.high = (u32)(ptr >> 32);
+	ptr_addr->m_halfs.low = (u32)ptr;
+#else
+	*offset = ptr;
+#endif
+}
+
 static inline int desc_len(u32 *desc)
 {
 	return *desc & HDR_DESCLEN_MASK;
@@ -68,6 +81,11 @@ static inline u32 *desc_end(u32 *desc)
 	return desc + desc_len(desc);
 }
 
+static inline void *desc_pdb(u32 *desc)
+{
+	return desc + 1;
+}
+
 static inline void init_desc(u32 *desc, u32 options)
 {
 	*desc = (options | HDR_ONE) + 1;
@@ -78,6 +96,15 @@ static inline void init_job_desc(u32 *desc, u32 options)
 	init_desc(desc, CMD_DESC_HDR | options);
 }
 
+static inline void init_job_desc_pdb(u32 *desc, u32 options, size_t pdb_bytes)
+{
+	u32 pdb_len = (pdb_bytes + CAAM_CMD_SZ - 1) / CAAM_CMD_SZ;
+
+	init_job_desc(desc,
+		      (((pdb_len + 1) << HDR_START_IDX_SHIFT) + pdb_len) |
+		       options);
+}
+
 static inline void append_ptr(u32 *desc, dma_addr_t ptr)
 {
 	dma_addr_t *offset = (dma_addr_t *)desc_end(desc);
diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c
index b766470ce2..93c24712d1 100644
--- a/drivers/crypto/fsl/jr.c
+++ b/drivers/crypto/fsl/jr.c
@@ -360,7 +360,7 @@ int run_descriptor_jr(uint32_t *desc)
 		}
 	}
 
-	if (!op.status) {
+	if (op.status) {
 		debug("Error %x\n", op.status);
 		ret = op.status;
 	}