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authorMarek Vasut <marex@denx.de>2019-10-18 00:22:31 +0200
committerMarek Vasut <marex@denx.de>2020-02-05 03:01:57 +0100
commit9a5a90ad9b3234c4739427cbe11219c51f0e9bd1 (patch)
tree46b9196f5316689236fd04480c0422077445765d /drivers/ddr/altera/sdram_gen5.c
parentcf89ef8d10f240554541c20b2e1bdcdd58d1d7e6 (diff)
ddr: altera: Add DDR2 support to Gen5 driver
Add DDR2 support to Gen5 DRAM driver. As the DDR2 macro names generated by Quartus are named differently than the DDR3 ones, use anon unions to store them in the same structures, without growing their size. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Diffstat (limited to 'drivers/ddr/altera/sdram_gen5.c')
-rw-r--r--drivers/ddr/altera/sdram_gen5.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/ddr/altera/sdram_gen5.c b/drivers/ddr/altera/sdram_gen5.c
index a3b914fdfc..3ea5a7c0c0 100644
--- a/drivers/ddr/altera/sdram_gen5.c
+++ b/drivers/ddr/altera/sdram_gen5.c
@@ -434,8 +434,10 @@ static void sdr_load_regs(struct socfpga_sdr_ctrl *sdr_ctrl,
debug("Configuring DRAMODT\n");
writel(cfg->dram_odt, &sdr_ctrl->dram_odt);
- debug("Configuring EXTRATIME1\n");
- writel(cfg->extratime1, &sdr_ctrl->extratime1);
+ if (dram_is_ddr(3)) {
+ debug("Configuring EXTRATIME1\n");
+ writel(cfg->extratime1, &sdr_ctrl->extratime1);
+ }
}
/**