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authorMarek Vasut <marex@denx.de>2015-07-18 04:24:49 +0200
committerMarek Vasut <marex@denx.de>2015-08-08 14:14:18 +0200
commit25fefe8bf8dc05c32b22ffff281fb293d92dc7e5 (patch)
tree7e8e0f0f20f8ef9ba61a4d1cdaea6ef4973388f7 /drivers/ddr/altera/sequencer.c
parent9da1d8f5b40ea0d0a53f0760e9fc0d6832cd5ab5 (diff)
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase_sweep_dq_in_delay() part 3
Replace at least one of the loops in this function with call of a standard function call instead of the ad-hoc implementation. The other one cannot be replaced, since the delay is incremented for each group. Signed-off-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'drivers/ddr/altera/sequencer.c')
-rw-r--r--drivers/ddr/altera/sequencer.c8
1 files changed, 1 insertions, 7 deletions
diff --git a/drivers/ddr/altera/sequencer.c b/drivers/ddr/altera/sequencer.c
index a1be7357e3..6df534fa43 100644
--- a/drivers/ddr/altera/sequencer.c
+++ b/drivers/ddr/altera/sequencer.c
@@ -1807,13 +1807,7 @@ rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase_sweep_dq_in_delay
for (r = 0; r < RW_MGR_MEM_NUMBER_OF_RANKS;
r += NUM_RANKS_PER_SHADOW_REG) {
- for (i = 0, p = test_bgn;
- i < RW_MGR_MEM_DQ_PER_READ_DQS;
- i++, p++) {
- scc_mgr_set_dq_in_delay(p, 0);
- scc_mgr_load_dq(p);
- }
-
+ scc_mgr_apply_group_dq_in_delay(test_bgn, 0);
writel(0, &sdr_scc_mgr->update);
}