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authorMarek Vasut <marex@denx.de>2015-07-19 01:34:43 +0200
committerMarek Vasut <marex@denx.de>2015-08-08 14:14:13 +0200
commitfa5d821b6b5aa09d1e1222ecb7bd1abbab0acf5c (patch)
tree7ee0e43909bb9957732d334243144537331a6ce8 /drivers/ddr/altera
parent37a37ca7f8428858417018b92a76ee01a747b99c (diff)
ddr: altera: Extract scc_mgr_set_hhp_extras()
Move scc_mgr_set_hhp_extras() out of scc_set_bypass_mode() as it has nothing to do in there. Instead, invoke it from mem_calibrate() just before invoking scc_set_bypass_mode(). Signed-off-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'drivers/ddr/altera')
-rw-r--r--drivers/ddr/altera/sequencer.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/ddr/altera/sequencer.c b/drivers/ddr/altera/sequencer.c
index baa6868c2d..8020651f88 100644
--- a/drivers/ddr/altera/sequencer.c
+++ b/drivers/ddr/altera/sequencer.c
@@ -527,10 +527,6 @@ static void scc_mgr_zero_all(void)
*/
static void scc_set_bypass_mode(const u32 write_group)
{
- /* Only needed once to set all groups, pins, DQ, DQS, DM. */
- if (write_group == 0)
- scc_mgr_set_hhp_extras();
-
/* Multicast to all DQ enables. */
writel(0xff, &sdr_scc_mgr->dq_ena);
writel(0xff, &sdr_scc_mgr->dm_ena);
@@ -3332,6 +3328,10 @@ static uint32_t mem_calibrate(void)
for (i = 0; i < RW_MGR_MEM_IF_READ_DQS_WIDTH; i++) {
writel(i, SDR_PHYGRP_SCCGRP_ADDRESS |
SCC_MGR_GROUP_COUNTER_OFFSET);
+ /* Only needed once to set all groups, pins, DQ, DQS, DM. */
+ if (i == 0)
+ scc_mgr_set_hhp_extras();
+
scc_set_bypass_mode(i);
}