summaryrefslogtreecommitdiff
path: root/drivers/ddr/fsl/main.c
diff options
context:
space:
mode:
authorPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>2017-07-05 11:55:23 +0200
committerPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>2017-08-13 17:12:32 +0200
commit629246907312390bbc281e531b60ac981842670f (patch)
treeceb934a71469ecb6fb6eddedefd701a9d46af16b /drivers/ddr/fsl/main.c
parentf5a432959aaf02a4c87067c9ae756ab21e98f8b8 (diff)
rockchip: clk: rk3368: support configuring the DRAM PLL (from TPL)
As part of the DRAM initialisation process (running as part of the TPL stage) on the RK3368, we need to set up the DRAM PLL. This implements support for configuring the PLL to for 1200, 1332 or 1600 MHz (i.e. for DDR3-1200, DDR3-1333, DDR3-1600 operating modes). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/ddr/fsl/main.c')
0 files changed, 0 insertions, 0 deletions