diff options
| author | Shengzhou Liu <Shengzhou.Liu@nxp.com> | 2016-11-21 11:36:48 +0800 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2016-12-05 08:31:45 -0800 |
| commit | 02fb2761576be8096ebf1b3f961a2cdb21b422ae (patch) | |
| tree | 70cd556e7498ef63f2d51519958cfc2994c73950 /drivers/ddr/fsl/mpc85xx_ddr_gen3.c | |
| parent | 5a17b8b5dab8973089b7400d05f8503d56f29370 (diff) | |
fsl/ddr: Add erratum_a009942_check_cpo and clean related erratum
- add additional function erratum_a009942_check_cpo to check if the
board needs tuning CPO calibration for optimal setting.
- move ERRATUM_A009942(with revision to check cpo_sample option) from
fsl_ddr_gen4.c to ctrl_regs.c for reuse on all DDR4/DDR3 parts.
- move ERRATUM_A008378 from fsl_ddr_gen4.c to ctrl_regs.c
- remove obsolete ERRATUM_A004934 which is replaced with ERRATUM_A009942.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
[YS: Replaced CONFIG_QEMU_E500 with CONFIG_ARCH_QEMU_E500]
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'drivers/ddr/fsl/mpc85xx_ddr_gen3.c')
| -rw-r--r-- | drivers/ddr/fsl/mpc85xx_ddr_gen3.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/drivers/ddr/fsl/mpc85xx_ddr_gen3.c b/drivers/ddr/fsl/mpc85xx_ddr_gen3.c index 653b7f0c77..1bfb9d4097 100644 --- a/drivers/ddr/fsl/mpc85xx_ddr_gen3.c +++ b/drivers/ddr/fsl/mpc85xx_ddr_gen3.c @@ -174,9 +174,6 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, out_be32(&ddr->debug[i], regs->debug[i]); } } -#ifdef CONFIG_SYS_FSL_ERRATUM_A_004934 - out_be32(&ddr->debug[28], 0x30003000); -#endif #ifdef CONFIG_SYS_FSL_ERRATUM_DDR_A003474 out_be32(&ddr->debug[12], 0x00000015); |