diff options
| author | York Sun <yorksun@freescale.com> | 2015-03-19 09:30:26 -0700 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2015-04-23 08:55:53 -0700 |
| commit | 66869f955417b89dbf6b7cbb72738b2205a26bf8 (patch) | |
| tree | 669eca4ca7d0e4d6d62ce480455d346f2b192f2f /drivers/ddr/fsl/mpc86xx_ddr.c | |
| parent | f8cb101e1e3f5ee2007b78b6b12e24120385aeac (diff) | |
drivers/ddr/fsl: Update DDR driver for DDR4
Add/update registers for DDR4, including DQ mappings. Allow raw timing
method used for all controllers. Update mode_9 register to 0x500 for
improved stability. Check DDR controller version number individually
in case a SoC has multiple DDR controllers of different versions.
Increase read-write turnaround for DDR4 high speeds.
Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'drivers/ddr/fsl/mpc86xx_ddr.c')
0 files changed, 0 insertions, 0 deletions