diff options
| author | Frieder Schrempf <frieder.schrempf@kontron.de> | 2019-12-11 10:01:19 +0000 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2020-01-07 10:26:57 +0100 |
| commit | 83083febf55679ee0fc68ba55e9af43add277b58 (patch) | |
| tree | b2495a3ed95c2ec411c67de34cccb125f4dbd2ba /drivers/ddr/imx/imx8m/ddr_init.c | |
| parent | 162c72c80445636ec73f8833b9e91f0128d21b8f (diff) | |
ddr: imx8m: Return error values from LPDDR4 training
In cases when the same SPL should run on boards with i.MX8MM, that
differ in DDR configuration, it is necessary to try different
parameters and check if the training done by the firmware suceeds or
not.
Therefore we return the DDR training/initialization success to the
upper layer in order to be able to retry with different settings if
necessary.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Diffstat (limited to 'drivers/ddr/imx/imx8m/ddr_init.c')
| -rw-r--r-- | drivers/ddr/imx/imx8m/ddr_init.c | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/drivers/ddr/imx/imx8m/ddr_init.c b/drivers/ddr/imx/imx8m/ddr_init.c index 21af66e4e7..af8c1427d2 100644 --- a/drivers/ddr/imx/imx8m/ddr_init.c +++ b/drivers/ddr/imx/imx8m/ddr_init.c @@ -20,9 +20,10 @@ void ddr_cfg_umctl2(struct dram_cfg_param *ddrc_cfg, int num) } } -void ddr_init(struct dram_timing_info *dram_timing) +int ddr_init(struct dram_timing_info *dram_timing) { unsigned int tmp, initial_drate, target_freq; + int ret; debug("DDRINFO: start DRAM init\n"); @@ -98,7 +99,11 @@ void ddr_init(struct dram_timing_info *dram_timing) * accessing relevant PUB registers */ debug("DDRINFO:ddrphy config start\n"); - ddr_cfg_phy(dram_timing); + + ret = ddr_cfg_phy(dram_timing); + if (ret) + return ret; + debug("DDRINFO: ddrphy config done\n"); /* @@ -165,4 +170,6 @@ void ddr_init(struct dram_timing_info *dram_timing) /* save the dram timing config into memory */ dram_config_save(dram_timing, CONFIG_SAVED_DRAM_TIMING_BASE); + + return 0; } |