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authorChris Packham <judge.packham@gmail.com>2020-01-30 12:50:44 +1300
committerStefan Roese <sr@denx.de>2020-04-14 08:59:44 +0200
commit236609d93c76b9e108d765cd7cf0632063ea8273 (patch)
treeaf7271c3b37a41b1731e2c56f06178e6f5d6043d /drivers/ddr/marvell
parent891483186052b259852f3f48926ff307763f4eb0 (diff)
ddr: marvell: a38x: Allow boards to specify CK_DELAY parameter
For some layouts it is necessary to adjust the CK_DELAY parameter to successfully complete DDR training. Add the ability to specify the CK_DELAY in the mv_ddr_topology_map. Signed-off-by: Chris Packham <judge.packham@gmail.com>
Diffstat (limited to 'drivers/ddr/marvell')
-rw-r--r--drivers/ddr/marvell/a38x/ddr3_init.c5
-rw-r--r--drivers/ddr/marvell/a38x/ddr_topology_def.h3
-rw-r--r--drivers/ddr/marvell/a38x/mv_ddr_topology.c10
-rw-r--r--drivers/ddr/marvell/a38x/mv_ddr_topology.h1
4 files changed, 19 insertions, 0 deletions
diff --git a/drivers/ddr/marvell/a38x/ddr3_init.c b/drivers/ddr/marvell/a38x/ddr3_init.c
index 22c8f9ca54..a971cc155a 100644
--- a/drivers/ddr/marvell/a38x/ddr3_init.c
+++ b/drivers/ddr/marvell/a38x/ddr3_init.c
@@ -106,8 +106,10 @@ static int mv_ddr_training_params_set(u8 dev_num)
struct tune_train_params params;
int status;
u32 cs_num;
+ int ck_delay;
cs_num = mv_ddr_cs_num_get();
+ ck_delay = mv_ddr_ck_delay_get();
/* NOTE: do not remove any field initilization */
params.ck_delay = TUNE_TRAINING_PARAMS_CK_DELAY;
@@ -131,6 +133,9 @@ static int mv_ddr_training_params_set(u8 dev_num)
params.g_odt_config = TUNE_TRAINING_PARAMS_ODT_CONFIG_2CS;
}
+ if (ck_delay > 0)
+ params.ck_delay = ck_delay;
+
status = ddr3_tip_tune_training_params(dev_num, &params);
if (MV_OK != status) {
printf("%s Training Sequence - FAILED\n", ddr_type);
diff --git a/drivers/ddr/marvell/a38x/ddr_topology_def.h b/drivers/ddr/marvell/a38x/ddr_topology_def.h
index 950f296ff9..34196b1662 100644
--- a/drivers/ddr/marvell/a38x/ddr_topology_def.h
+++ b/drivers/ddr/marvell/a38x/ddr_topology_def.h
@@ -127,6 +127,9 @@ struct mv_ddr_topology_map {
/* Clock enable mask */
u32 clk_enable;
+
+ /* Clock delay */
+ int ck_delay;
};
enum mv_ddr_iface_mode {
diff --git a/drivers/ddr/marvell/a38x/mv_ddr_topology.c b/drivers/ddr/marvell/a38x/mv_ddr_topology.c
index ef3b658a78..09840b1e70 100644
--- a/drivers/ddr/marvell/a38x/mv_ddr_topology.c
+++ b/drivers/ddr/marvell/a38x/mv_ddr_topology.c
@@ -229,6 +229,16 @@ int mv_ddr_is_ecc_ena(void)
return 0;
}
+int mv_ddr_ck_delay_get(void)
+{
+ struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get();
+
+ if (tm->ck_delay)
+ return tm->ck_delay;
+
+ return -1;
+}
+
/* translate topology map definition to real memory size in bits */
static unsigned int mem_size[] = {
ADDR_SIZE_512MB,
diff --git a/drivers/ddr/marvell/a38x/mv_ddr_topology.h b/drivers/ddr/marvell/a38x/mv_ddr_topology.h
index 766f25db57..4fca47689f 100644
--- a/drivers/ddr/marvell/a38x/mv_ddr_topology.h
+++ b/drivers/ddr/marvell/a38x/mv_ddr_topology.h
@@ -319,6 +319,7 @@ unsigned short mv_ddr_bus_bit_mask_get(void);
unsigned int mv_ddr_if_bus_width_get(void);
unsigned int mv_ddr_cs_num_get(void);
int mv_ddr_is_ecc_ena(void);
+int mv_ddr_ck_delay_get(void);
unsigned long long mv_ddr_mem_sz_per_cs_get(void);
unsigned long long mv_ddr_mem_sz_get(void);
unsigned int mv_ddr_rtt_nom_get(void);