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authorMarek Vasut <marex@denx.de>2015-07-20 09:20:20 +0200
committerMarek Vasut <marex@denx.de>2015-08-08 14:14:20 +0200
commit5735540fd97f0d3167e34f4280f375126aedccd1 (patch)
tree581be1f90ce7fb80205a07bd28d524ccb09a77e8 /drivers/ddr
parent52e8f217f9973588b0f407acbeaf3a41dfd0b2db (diff)
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part 5
Fix the data types, constify where applicable. Signed-off-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'drivers/ddr')
-rw-r--r--drivers/ddr/altera/sequencer.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/ddr/altera/sequencer.c b/drivers/ddr/altera/sequencer.c
index e575c217a2..b700116403 100644
--- a/drivers/ddr/altera/sequencer.c
+++ b/drivers/ddr/altera/sequencer.c
@@ -1593,13 +1593,13 @@ static int sdr_find_window_center(const u32 grp, const u32 work_bgn,
return -EINVAL;
}
-/* find a good dqs enable to use */
-static uint32_t rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase(u32 grp)
+static u32 rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase(const u32 grp)
{
- uint32_t d, p, i;
- uint32_t dtaps_per_ptap;
- uint32_t work_bgn, work_end;
- uint32_t found_passing_read, found_failing_read, initial_failing_dtap;
+ u32 d, p, i;
+ u32 dtaps_per_ptap;
+ u32 work_bgn, work_end;
+ u32 found_passing_read, found_failing_read, initial_failing_dtap;
+ int ret;
debug("%s:%d %u\n", __func__, __LINE__, grp);