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authorStephen Warren <swarren@nvidia.com>2018-07-31 12:38:27 -0600
committerTom Rini <trini@konsulko.com>2018-08-01 20:06:10 -0400
commita839c3641e4de98981695056eeeb2ec17ba1a4ab (patch)
treee2cae64abf3683a916118d9fb3655d7658206aa0 /drivers/ddr
parent61523dde17d1539b8ea361e25909acfdfc465155 (diff)
ARM: tegra: align carveout size
Align the size of the carveout region to 2M. This ensures that the size can be accurately represented by an LPAE page table that uses sections. This solves a bug (hang at boot time soon after printing the DRAM size) that only shows up when the following two commits are merged together: d32e86bde8a3 ARM: HYP/non-sec: enable ARMV7_LPAE if HYP mode is supported 6e584e633d10 ARM: tegra: avoid using secure carveout RAM Cc: Mark Kettenis <kettenis@openbsd.org> Cc: Alexander Graf <agraf@suse.de> Acked-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'drivers/ddr')
0 files changed, 0 insertions, 0 deletions