diff options
author | Tom Rini <trini@ti.com> | 2014-07-28 14:54:29 -0400 |
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committer | Tom Rini <trini@ti.com> | 2014-07-28 14:54:29 -0400 |
commit | d5f8a6ddd41dee0de17888f8b5334fe1b636c4ca (patch) | |
tree | 1df8ab92fd228598d5884db37cceddcb18a0c020 /drivers/ddr | |
parent | ee860c60d2c5283c009f7ea740c6ee706da87cb7 (diff) | |
parent | fb5368789a45ca5ee4396cbbf563a8f16ab24f9c (diff) |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Diffstat (limited to 'drivers/ddr')
-rw-r--r-- | drivers/ddr/fsl/ctrl_regs.c | 3 | ||||
-rw-r--r-- | drivers/ddr/fsl/fsl_ddr_gen4.c | 7 |
2 files changed, 8 insertions, 2 deletions
diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c index dcf6287f66..04e4178b15 100644 --- a/drivers/ddr/fsl/ctrl_regs.c +++ b/drivers/ddr/fsl/ctrl_regs.c @@ -1857,6 +1857,9 @@ static void set_timing_cfg_8(fsl_ddr_cfg_regs_t *ddr, acttoact_bg = picos_to_mclk(common_dimm->trrdl_ps); wrtord_bg = max(4, picos_to_mclk(7500)); + if (popts->otf_burst_chop_en) + wrtord_bg += 2; + pre_all_rec = 0; ddr->timing_cfg_8 = (0 diff --git a/drivers/ddr/fsl/fsl_ddr_gen4.c b/drivers/ddr/fsl/fsl_ddr_gen4.c index 7cd878aeec..bfc76b3485 100644 --- a/drivers/ddr/fsl/fsl_ddr_gen4.c +++ b/drivers/ddr/fsl/fsl_ddr_gen4.c @@ -8,6 +8,7 @@ #include <asm/io.h> #include <fsl_ddr_sdram.h> #include <asm/processor.h> +#include <fsl_immap.h> #include <fsl_ddr.h> #if (CONFIG_CHIP_SELECTS_PER_CTRL > 4) @@ -183,12 +184,14 @@ step2: * we choose the max, that is 500 us for all of case. */ udelay(500); - asm volatile("sync;isync"); + mb(); + isb(); /* Let the controller go */ temp_sdram_cfg = ddr_in32(&ddr->sdram_cfg) & ~SDRAM_CFG_BI; ddr_out32(&ddr->sdram_cfg, temp_sdram_cfg | SDRAM_CFG_MEM_EN); - asm volatile("sync;isync"); + mb(); + isb(); total_gb_size_per_controller = 0; for (i = 0; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) { |