Merge branch 'master' of git://git.denx.de/u-boot-arm

* 'master' of git://git.denx.de/u-boot-arm:
  davinci: Remove unwanted memsize.c from hawkboard's nand spl build
  devkit8000: Move CONFIG_SYS_TEXT_BASE out of bss
  da850evm: pass board revision info to kernel
  arch/arm/include/asm/arch-omap5/clocks.h: Fix GCC 4.2 warnings
  arch/arm/cpu/armv7/omap-common/clocks-common.c: Fix GCC 4.6 warnings
  arch/arm/cpu/armv7/omap-common/spl.c: Fix GCC 4.2 warnings
  MX35: flea3: changes due to hardware revision B
  MX: serial_mxc: cleanup removing nasty #ifdef
  M28: Fix OB1 bug in GPIO driver
  MXS: Add static annotations to dma driver
  apbh_dma: return error value on timeout
  Efika: Configure additional regulators for HDMI output
  mx5: Correct a warning in clock.c
  MC13892: Add REGMODE0 bits definitions
  mx51evk: Configure the pins as GPIOs prior to using gpio_get_value
  mx53smd: Configure the pins as GPIOs prior to using gpio_get_value
  mx53evk: Configure the pins as GPIOs prior to using gpio_get_value
  mx53ard: Configure the pins as GPIOs prior to using gpio_get_value
  mx53loco: Configure the pins as GPIOs prior to using gpio_get_value
  OMAP3: Add SPL_BOARD_INIT hook
  AM3517 CraneBoard: Add SPL support
  AM3517: Add SPL support
  OMAP3: Add SPL support to omap3_evm
  OMAP3: Add SPL support to Beagleboard
  OMAP3 SPL: Add identify_nand_chip function
  OMAP3 SPL: Rework memory initalization and devkit8000 support
  OMAP3: Suffix all Micron memory timing parts with their speed
  OMAP3: Add optimal SDRC autorefresh control values
  omap3: mem: Add MCFG helper macro
  OMAP3: Remove get_mem_type prototype
  OMAP3: Change mem_ok to clear again after reading back
  OMAP3: Add a helper function to set timings in SDRC
  OMAP3: Update SDRC dram_init to always call make_cs1_contiguous()
  omap3: mem: Comment enable_gpmc_cs_config more
  ARM: davici_emac: Fix condition for number of phy detects
  arm: printf() is not available in some SPL configurations
  arm, davinci: add support for am1808 based enbw_cmc board
  arm, davinci: move misc function in arch tree
  arm, board/davinci/common/misc.c: Codingstyle cleanup
  arm, davinci, da850: add uart1 tx rx pinmux config
  arm, davinci: move davinci_rtc struct to hardware.h
  arm, davinci: Remove duplication of pinmux configuration code
  arm, hawkboard: Use the pinmux configurations defined in the arch tree
  arm, da850evm: Use the pinmux configurations defined in the arch tree
  arm, da850: Add pinmux configurations to the arch tree
  arm, da850evm: Do pinmux configuration for EMAC together with other pinmuxes
  arm, hawkboard: Remove obsolete struct pinmux_config i2c_pins
  arm, davinci: Move pinmux functions from board to arch tree
  arm, arm926ejs: always do cpu critical inits
  omap_gpmc: use SOFTECC in SPL if it's enabled
  nand_spl_simple: add support for software ECC
  AM3517: move AM3517 specific mux defines to generic header
  AM35xx: add EMAC support
  davinci_emac: hardcode 100Mbps for AM35xx and RMII
  davinci_emac: fix for running with dcache enabled
  arm926ejs: add noop implementation for dcache ops
  davinci_emac: conditionally compile specific PHY support
  davinci_emac: use internal addresses in buffer descriptors
  davinci_emac: move arch-independent defines to separate header
  BeagleBoard: config: Really switch to ttyO2
  ARM: davinci_dm6467Tevm: Fix build breakage
  ARM: OMAP: Remove STACKSIZE for IRQ and FIQ if unused
  ARM: OMAP3: Remove unused define SDRC_R_C_B
  ARM: OMAP3: Remove unused define CONFIG_OMAP3430
  omap4: fix IO setting
  omap4+: streamline CONFIG_SYS_TEXT_BASE and other SDRAM addresses
  omap4460: add ES1.1 identification
  omap4: emif: fix error in driver
  omap: remove I2C from SPL
  omap4460: fix TPS initialization
  omap: fix cache line size for omap3/omap4 boards
  omap4: ttyO2 instead of ttyS2 in default bootargs
  omap: Improve PLL parameter calculation tool
  start.S: remove omap3 specific code from start.S
  armv7: setup vector
  armv7: include armv7/cpu.c in SPL build
  armv7: disable L2 cache in cleanup_before_linux()
  arm, arm926ejs: Fix clear bss loop for zero length bss
  PXA: Move colibri_pxa270 to board/toradex/
  PXA: Flip colibri_pxa27x to pxa-common.h
  PXA: Introduce common configuration header for PXA
  PXA: Rename pxa_dram_init to pxa2xx_dram_init
  PXA: Squash extern pxa_dram_init()
  PXA: Export cpu_is_ and pxa_dram_init functions
  PXA: Cleanup Colibri PXA270
  PXA: Replace timer driver
  PXA: Add cpuinfo display for PXA2xx
  PXA: Separate PXA2xx CPU init
  PXA: Rename CONFIG_PXA2[57]X to CONFIG_CPU_PXA2[57]X
  PXA: Unify vpac270 environment size
  PXA: Enable command line editing for vpac270
  PXA: Adapt Voipac PXA270 to OneNAND SPL
  PXA: Drop Voipac PXA270 OneNAND IPL
  PXA: Fixup PXA25x boards after start.S update
  PXA: Re-add the Dcache locking as RAM for pxa250
  PXA: Rework start.S to be closer to other ARMs
  PXA: Drop XM250 board
  PXA: Drop PLEB2 board
  PXA: Drop CRADLE board
  PXA: Drop CERF250 board
  Fix regression in SMDK6400
  nand: Add common functions to linux/mtd/nand.h
  Ethernut 5 board support
  net: Armada100: Fix compilation warnings
  ARM: remove duplicated code for LaCie boards
  ARM: add support for LaCie 2Big Network v2
  mvsata: fix ide_preinit for missing disks
  netspace_v2: Read Ethernet MAC address from EEPROM
  omap3evm: Add support for EFI partitions
  part_efi: Fix compile errors

1 files changed, 51 insertions, 160 deletions

diff --git a/drivers/dma/apbh_dma.c b/drivers/dma/apbh_dma.c
index 69a10428ef..e85f5fe6d2 100644
--- a/drivers/dma/apbh_dma.c
+++ b/drivers/dma/apbh_dma.c
@@ -53,6 +53,47 @@ int mxs_dma_validate_chan(int channel)
 }
 
 /*
+ * Return the address of the command within a descriptor.
+ */
+static unsigned int mxs_dma_cmd_address(struct mxs_dma_desc *desc)
+{
+	return desc->address + offsetof(struct mxs_dma_desc, cmd);
+}
+
+/*
+ * Read a DMA channel's hardware semaphore.
+ *
+ * As used by the MXS platform's DMA software, the DMA channel's hardware
+ * semaphore reflects the number of DMA commands the hardware will process, but
+ * has not yet finished. This is a volatile value read directly from hardware,
+ * so it must be be viewed as immediately stale.
+ *
+ * If the channel is not marked busy, or has finished processing all its
+ * commands, this value should be zero.
+ *
+ * See mxs_dma_append() for details on how DMA command blocks must be configured
+ * to maintain the expected behavior of the semaphore's value.
+ */
+static int mxs_dma_read_semaphore(int channel)
+{
+	struct mx28_apbh_regs *apbh_regs =
+		(struct mx28_apbh_regs *)MXS_APBH_BASE;
+	uint32_t tmp;
+	int ret;
+
+	ret = mxs_dma_validate_chan(channel);
+	if (ret)
+		return ret;
+
+	tmp = readl(&apbh_regs->ch[channel].hw_apbh_ch_sema);
+
+	tmp &= APBH_CHn_SEMA_PHORE_MASK;
+	tmp >>= APBH_CHn_SEMA_PHORE_OFFSET;
+
+	return tmp;
+}
+
+/*
  * Enable a DMA channel.
  *
  * If the given channel has any DMA descriptors on its active list, this
@@ -61,7 +102,7 @@ int mxs_dma_validate_chan(int channel)
  * This function marks the DMA channel as "busy," whether or not there are any
  * descriptors to process.
  */
-int mxs_dma_enable(int channel)
+static int mxs_dma_enable(int channel)
 {
 	struct mx28_apbh_regs *apbh_regs =
 		(struct mx28_apbh_regs *)MXS_APBH_BASE;
@@ -132,7 +173,7 @@ int mxs_dma_enable(int channel)
  * state. It is unwise to call this function if there is ANY chance the hardware
  * is still processing a command.
  */
-int mxs_dma_disable(int channel)
+static int mxs_dma_disable(int channel)
 {
 	struct mxs_dma_chan *pchan;
 	struct mx28_apbh_regs *apbh_regs =
@@ -162,7 +203,7 @@ int mxs_dma_disable(int channel)
 /*
  * Resets the DMA channel hardware.
  */
-int mxs_dma_reset(int channel)
+static int mxs_dma_reset(int channel)
 {
 	struct mx28_apbh_regs *apbh_regs =
 		(struct mx28_apbh_regs *)MXS_APBH_BASE;
@@ -179,90 +220,11 @@ int mxs_dma_reset(int channel)
 }
 
 /*
- * Freeze a DMA channel.
- *
- * This function causes the channel to continuously fail arbitration for bus
- * access, which halts all forward progress without losing any state. A call to
- * mxs_dma_unfreeze() will cause the channel to continue its current operation
- * with no ill effect.
- */
-int mxs_dma_freeze(int channel)
-{
-	struct mx28_apbh_regs *apbh_regs =
-		(struct mx28_apbh_regs *)MXS_APBH_BASE;
-	int ret;
-
-	ret = mxs_dma_validate_chan(channel);
-	if (ret)
-		return ret;
-
-	writel(1 << (channel + APBH_CHANNEL_CTRL_FREEZE_CHANNEL_OFFSET),
-		&apbh_regs->hw_apbh_channel_ctrl_set);
-
-	return 0;
-}
-
-/*
- * Unfreeze a DMA channel.
- *
- * This function reverses the effect of mxs_dma_freeze(), enabling the DMA
- * channel to continue from where it was frozen.
- */
-int mxs_dma_unfreeze(int channel)
-{
-	struct mx28_apbh_regs *apbh_regs =
-		(struct mx28_apbh_regs *)MXS_APBH_BASE;
-	int ret;
-
-	ret = mxs_dma_validate_chan(channel);
-	if (ret)
-		return ret;
-
-	writel(1 << (channel + APBH_CHANNEL_CTRL_FREEZE_CHANNEL_OFFSET),
-		&apbh_regs->hw_apbh_channel_ctrl_clr);
-
-	return 0;
-}
-
-/*
- * Read a DMA channel's hardware semaphore.
- *
- * As used by the MXS platform's DMA software, the DMA channel's hardware
- * semaphore reflects the number of DMA commands the hardware will process, but
- * has not yet finished. This is a volatile value read directly from hardware,
- * so it must be be viewed as immediately stale.
- *
- * If the channel is not marked busy, or has finished processing all its
- * commands, this value should be zero.
- *
- * See mxs_dma_append() for details on how DMA command blocks must be configured
- * to maintain the expected behavior of the semaphore's value.
- */
-int mxs_dma_read_semaphore(int channel)
-{
-	struct mx28_apbh_regs *apbh_regs =
-		(struct mx28_apbh_regs *)MXS_APBH_BASE;
-	uint32_t tmp;
-	int ret;
-
-	ret = mxs_dma_validate_chan(channel);
-	if (ret)
-		return ret;
-
-	tmp = readl(&apbh_regs->ch[channel].hw_apbh_ch_sema);
-
-	tmp &= APBH_CHn_SEMA_PHORE_MASK;
-	tmp >>= APBH_CHn_SEMA_PHORE_OFFSET;
-
-	return tmp;
-}
-
-/*
  * Enable or disable DMA interrupt.
  *
  * This function enables the given DMA channel to interrupt the CPU.
  */
-int mxs_dma_enable_irq(int channel, int enable)
+static int mxs_dma_enable_irq(int channel, int enable)
 {
 	struct mx28_apbh_regs *apbh_regs =
 		(struct mx28_apbh_regs *)MXS_APBH_BASE;
@@ -283,32 +245,12 @@ int mxs_dma_enable_irq(int channel, int enable)
 }
 
 /*
- * Check if a DMA interrupt is pending.
- */
-int mxs_dma_irq_is_pending(int channel)
-{
-	struct mx28_apbh_regs *apbh_regs =
-		(struct mx28_apbh_regs *)MXS_APBH_BASE;
-	uint32_t tmp;
-	int ret;
-
-	ret = mxs_dma_validate_chan(channel);
-	if (ret)
-		return ret;
-
-	tmp = readl(&apbh_regs->hw_apbh_ctrl1);
-	tmp |= readl(&apbh_regs->hw_apbh_ctrl2);
-
-	return (tmp >> channel) & 1;
-}
-
-/*
  * Clear DMA interrupt.
  *
  * The software that is using the DMA channel must register to receive its
  * interrupts and, when they arrive, must call this function to clear them.
  */
-int mxs_dma_ack_irq(int channel)
+static int mxs_dma_ack_irq(int channel)
 {
 	struct mx28_apbh_regs *apbh_regs =
 		(struct mx28_apbh_regs *)MXS_APBH_BASE;
@@ -327,7 +269,7 @@ int mxs_dma_ack_irq(int channel)
 /*
  * Request to reserve a DMA channel
  */
-int mxs_dma_request(int channel)
+static int mxs_dma_request(int channel)
 {
 	struct mxs_dma_chan *pchan;
 
@@ -359,7 +301,7 @@ int mxs_dma_request(int channel)
  * The channel will NOT be released if it's marked "busy" (see
  * mxs_dma_enable()).
  */
-int mxs_dma_release(int channel)
+static int mxs_dma_release(int channel)
 {
 	struct mxs_dma_chan *pchan;
 	int ret;
@@ -411,32 +353,6 @@ void mxs_dma_desc_free(struct mxs_dma_desc *pdesc)
 }
 
 /*
- * Return the address of the command within a descriptor.
- */
-unsigned int mxs_dma_cmd_address(struct mxs_dma_desc *desc)
-{
-	return desc->address + offsetof(struct mxs_dma_desc, cmd);
-}
-
-/*
- * Check if descriptor is on a channel's active list.
- *
- * This function returns the state of a descriptor's "ready" flag. This flag is
- * usually set only if the descriptor appears on a channel's active list. The
- * descriptor may or may not have already been processed by the hardware.
- *
- * The "ready" flag is set when the descriptor is submitted to a channel by a
- * call to mxs_dma_append() or mxs_dma_append_list(). The "ready" flag is
- * cleared when a processed descriptor is moved off the active list by a call
- * to mxs_dma_finish(). The "ready" flag is NOT cleared if the descriptor is
- * aborted by a call to mxs_dma_disable().
- */
-int mxs_dma_desc_pending(struct mxs_dma_desc *pdesc)
-{
-	return pdesc->flags & MXS_DMA_DESC_READY;
-}
-
-/*
  * Add a DMA descriptor to a channel.
  *
  * If the descriptor list for this channel is not empty, this function sets the
@@ -509,31 +425,6 @@ int mxs_dma_desc_append(int channel, struct mxs_dma_desc *pdesc)
 }
 
 /*
- * Retrieve processed DMA descriptors.
- *
- * This function moves all the descriptors from the DMA channel's "done" list to
- * the head of the given list.
- */
-int mxs_dma_get_finished(int channel, struct list_head *head)
-{
-	struct mxs_dma_chan *pchan;
-	int ret;
-
-	ret = mxs_dma_validate_chan(channel);
-	if (ret)
-		return ret;
-
-	if (head == NULL)
-		return 0;
-
-	pchan = mxs_dma_channels + channel;
-
-	list_splice(&pchan->done, head);
-
-	return 0;
-}
-
-/*
  * Clean up processed DMA descriptors.
  *
  * This function removes processed DMA descriptors from the "active" list. Pass
@@ -544,7 +435,7 @@ int mxs_dma_get_finished(int channel, struct list_head *head)
  * This function marks the DMA channel as "not busy" if no unprocessed
  * descriptors remain on the "active" list.
  */
-int mxs_dma_finish(int channel, struct list_head *head)
+static int mxs_dma_finish(int channel, struct list_head *head)
 {
 	int sem;
 	struct mxs_dma_chan *pchan;
@@ -590,7 +481,7 @@ int mxs_dma_finish(int channel, struct list_head *head)
 /*
  * Wait for DMA channel to complete
  */
-int mxs_dma_wait_complete(uint32_t timeout, unsigned int chan)
+static int mxs_dma_wait_complete(uint32_t timeout, unsigned int chan)
 {
 	struct mx28_apbh_regs *apbh_regs =
 		(struct mx28_apbh_regs *)MXS_APBH_BASE;
@@ -606,7 +497,7 @@ int mxs_dma_wait_complete(uint32_t timeout, unsigned int chan)
 		mxs_dma_reset(chan);
 	}
 
-	return 0;
+	return ret;
 }
 
 /*