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authorMichal Simek <michal.simek@xilinx.com>2014-03-13 13:07:57 +0100
committerMichal Simek <michal.simek@xilinx.com>2014-05-13 09:13:59 +0200
commit14cfc4f3735d9704cb6a630ef302be596d380684 (patch)
tree23c759ab37c1368763488a5548813231cfa1d3d0 /drivers/fpga/zynqpl.c
parent2df9d5c431fca07c9868a36b48ee771bde6b19e8 (diff)
fpga: xilinx: Simplify load/dump/info function handling
Connect FPGA version with appropriate operations to remove huge switch-cases for every FPGA family. Tested on Zynq. Spartan2/Spartan3/Virtex2 just compile test. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'drivers/fpga/zynqpl.c')
-rw-r--r--drivers/fpga/zynqpl.c13
1 files changed, 9 insertions, 4 deletions
diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c
index b4d0e2278c..dcd34951ad 100644
--- a/drivers/fpga/zynqpl.c
+++ b/drivers/fpga/zynqpl.c
@@ -36,7 +36,7 @@
#define CONFIG_SYS_FPGA_PROG_TIME (CONFIG_SYS_HZ * 4) /* 4 s */
#endif
-int zynq_info(xilinx_desc *desc)
+static int zynq_info(xilinx_desc *desc)
{
return FPGA_SUCCESS;
}
@@ -152,8 +152,7 @@ static void *check_data(u8 *buf, size_t bsize, u32 *swap)
return 0;
}
-
-int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize)
+static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize)
{
unsigned long ts; /* Timestamp */
u32 partialbit = 0;
@@ -358,7 +357,13 @@ int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize)
return FPGA_SUCCESS;
}
-int zynq_dump(xilinx_desc *desc, const void *buf, size_t bsize)
+static int zynq_dump(xilinx_desc *desc, const void *buf, size_t bsize)
{
return FPGA_FAIL;
}
+
+struct xilinx_fpga_op zynq_op = {
+ .load = zynq_load,
+ .dump = zynq_dump,
+ .info = zynq_info,
+};