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authorCarlo Caione <ccaione@baylibre.com>2018-12-06 08:08:11 +0000
committerNeil Armstrong <narmstrong@baylibre.com>2018-12-07 11:01:09 +0100
commit139ebe9eb9dac96ab72680e7e8ba77ef9b4cc88b (patch)
treebf7490c71acddd530252ad53b4a9ca2fb403ce66 /drivers/fpga
parentfb19c7bade45e97112f65671dd0c5855c727675a (diff)
pinctrl: meson: axg: Fix GPIO pin offsets
The pin number (first and last) in the bank definition is missing the pin base offset shifting. This is causing a miscalculation when retrieving the register and pin offsets in the GPIO driver causing the 'gpio' command to drive the wrong pins / GPIOs in the second GPIO chip (the AO bank is driven correctly because the shifting is already 0). Signed-off-by: Carlo Caione <ccaione@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Diffstat (limited to 'drivers/fpga')
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