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authorShaohui Xie <Shaohui.Xie@freescale.com>2015-10-26 19:47:48 +0800
committerYork Sun <yorksun@freescale.com>2015-10-29 10:34:00 -0700
commitbc24611ca11e276194e1edbb71070699a98389c5 (patch)
tree3f0d005ae2633631bc9f5279e727c98b9d16ce4a /drivers/fpga
parent8225b2fd877f148a7663b93db55b235062ad4667 (diff)
net/fm: Add QSGMII PCS init
QSGMII PCS needed to be programmed same as SGMII PCS, and there are four ports in QSGMII PCS, port 0, 1, 2, 3, all the four ports shared port 0's MDIO controller, so when programming port 0, we continue to program other three ports. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'drivers/fpga')
0 files changed, 0 insertions, 0 deletions