diff options
| author | Tien Fong Chee <tien.fong.chee@intel.com> | 2019-05-07 17:42:27 +0800 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2019-05-10 22:48:10 +0200 |
| commit | c1cf5391807640159edcd363ea1cbaf226a56b58 (patch) | |
| tree | 50590424a89ff8b448566e3de3794e2087037f6a /drivers/fpga | |
| parent | f4b53b24d04fb223a6d5332c3744b955c462326d (diff) | |
ARM: socfpga: Moving the watchdog reset to the for-loop status polling
Current watchdog reset is misplaced after for-loop status polling, so
this poses a risk that watchdog can't be reset timely if polling taking
longer than watchdog timeout. This patch moving the watchdog reset
into polling to ensure the watchdog can be reset timely.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Diffstat (limited to 'drivers/fpga')
| -rw-r--r-- | drivers/fpga/socfpga_arria10.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/fpga/socfpga_arria10.c b/drivers/fpga/socfpga_arria10.c index b0abe1955c..9499d1a014 100644 --- a/drivers/fpga/socfpga_arria10.c +++ b/drivers/fpga/socfpga_arria10.c @@ -360,6 +360,7 @@ static int fpgamgr_program_poll_cd(void) printf("nstatus == 0 while waiting for condone\n"); return -EPERM; } + WATCHDOG_RESET(); } if (i == FPGA_TIMEOUT_CNT) @@ -433,7 +434,6 @@ int fpgamgr_program_finish(void) printf("FPGA: Poll CD failed with error code %d\n", status); return -EPERM; } - WATCHDOG_RESET(); /* Ensure the FPGA entering user mode */ status = fpgamgr_program_poll_usermode(); |