gpio: atmel_pio4: give a full configuration when muxing pins

When a pin is muxed to a peripheral or as a GPIO, the only
configuration that can be set is the pullup. It is too restrictive
so this patch allows to give a full configuration.

Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>

1 files changed, 18 insertions, 18 deletions

diff --git a/drivers/gpio/atmel_pio4.c b/drivers/gpio/atmel_pio4.c
index 2385dec961..95a189a50f 100644
--- a/drivers/gpio/atmel_pio4.c
+++ b/drivers/gpio/atmel_pio4.c
@@ -43,7 +43,7 @@ static struct atmel_pio4_port *atmel_pio4_port_base(u32 port)
 }
 
 static int atmel_pio4_config_io_func(u32 port, u32 pin,
-				     u32 func, u32 use_pullup)
+				     u32 func, u32 config)
 {
 	struct atmel_pio4_port *port_base;
 	u32 reg, mask;
@@ -57,7 +57,7 @@ static int atmel_pio4_config_io_func(u32 port, u32 pin,
 
 	mask = 1 << pin;
 	reg = func;
-	reg |= use_pullup ? ATMEL_PIO_PUEN_MASK : 0;
+	reg |= config;
 
 	writel(mask, &port_base->mskr);
 	writel(reg, &port_base->cfgr);
@@ -65,60 +65,60 @@ static int atmel_pio4_config_io_func(u32 port, u32 pin,
 	return 0;
 }
 
-int atmel_pio4_set_gpio(u32 port, u32 pin, u32 use_pullup)
+int atmel_pio4_set_gpio(u32 port, u32 pin, u32 config)
 {
 	return atmel_pio4_config_io_func(port, pin,
 					 ATMEL_PIO_CFGR_FUNC_GPIO,
-					 use_pullup);
+					 config);
 }
 
-int atmel_pio4_set_a_periph(u32 port, u32 pin, u32 use_pullup)
+int atmel_pio4_set_a_periph(u32 port, u32 pin, u32 config)
 {
 	return atmel_pio4_config_io_func(port, pin,
 					 ATMEL_PIO_CFGR_FUNC_PERIPH_A,
-					 use_pullup);
+					 config);
 }
 
-int atmel_pio4_set_b_periph(u32 port, u32 pin, u32 use_pullup)
+int atmel_pio4_set_b_periph(u32 port, u32 pin, u32 config)
 {
 	return atmel_pio4_config_io_func(port, pin,
 					 ATMEL_PIO_CFGR_FUNC_PERIPH_B,
-					 use_pullup);
+					 config);
 }
 
-int atmel_pio4_set_c_periph(u32 port, u32 pin, u32 use_pullup)
+int atmel_pio4_set_c_periph(u32 port, u32 pin, u32 config)
 {
 	return atmel_pio4_config_io_func(port, pin,
 					 ATMEL_PIO_CFGR_FUNC_PERIPH_C,
-					 use_pullup);
+					 config);
 }
 
-int atmel_pio4_set_d_periph(u32 port, u32 pin, u32 use_pullup)
+int atmel_pio4_set_d_periph(u32 port, u32 pin, u32 config)
 {
 	return atmel_pio4_config_io_func(port, pin,
 					 ATMEL_PIO_CFGR_FUNC_PERIPH_D,
-					 use_pullup);
+					 config);
 }
 
-int atmel_pio4_set_e_periph(u32 port, u32 pin, u32 use_pullup)
+int atmel_pio4_set_e_periph(u32 port, u32 pin, u32 config)
 {
 	return atmel_pio4_config_io_func(port, pin,
 					 ATMEL_PIO_CFGR_FUNC_PERIPH_E,
-					 use_pullup);
+					 config);
 }
 
-int atmel_pio4_set_f_periph(u32 port, u32 pin, u32 use_pullup)
+int atmel_pio4_set_f_periph(u32 port, u32 pin, u32 config)
 {
 	return atmel_pio4_config_io_func(port, pin,
 					 ATMEL_PIO_CFGR_FUNC_PERIPH_F,
-					 use_pullup);
+					 config);
 }
 
-int atmel_pio4_set_g_periph(u32 port, u32 pin, u32 use_pullup)
+int atmel_pio4_set_g_periph(u32 port, u32 pin, u32 config)
 {
 	return atmel_pio4_config_io_func(port, pin,
 					 ATMEL_PIO_CFGR_FUNC_PERIPH_G,
-					 use_pullup);
+					 config);
 }
 
 int atmel_pio4_set_pio_output(u32 port, u32 pin, u32 value)