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authorPatil, Rachna <rachna@ti.com>2012-01-22 23:44:12 +0000
committerHeiko Schocher <hs@denx.de>2012-01-23 11:57:31 +0100
commit2faa76196af4b3e93bcb9e38ed9090cbd3b06db3 (patch)
tree7d1dd47853bcecda5fa218e933efce64b8001e68 /drivers/i2c/omap24xx_i2c.h
parent137703b811502dfea364650fb3e17f20b4c21333 (diff)
ARM: I2C: I2C Multi byte address support
Existing OMAP I2C driver does not support address length greater than one. Hence this patch is to add support for 2 byte address read/write. Signed-off-by: Philip, Avinash <avinashphilip@ti.com> Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com> Signed-off-by: Patil, Rachna <rachna@ti.com>
Diffstat (limited to 'drivers/i2c/omap24xx_i2c.h')
-rw-r--r--drivers/i2c/omap24xx_i2c.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/i2c/omap24xx_i2c.h b/drivers/i2c/omap24xx_i2c.h
index 1f38c232d1..9a0b126b38 100644
--- a/drivers/i2c/omap24xx_i2c.h
+++ b/drivers/i2c/omap24xx_i2c.h
@@ -60,7 +60,9 @@
/* I2C Buffer Configuration Register (I2C_BUF): */
#define I2C_BUF_RDMA_EN (1 << 15) /* Receive DMA channel enable */
+#define I2C_RXFIFO_CLEAR (1 << 14) /* RX FIFO Clear */
#define I2C_BUF_XDMA_EN (1 << 7) /* Transmit DMA channel enable */
+#define I2C_TXFIFO_CLEAR (1 << 6) /* TX FIFO clear */
/* I2C Configuration Register (I2C_CON): */