diff options
| author | Ismael Luceno Cortes <ismael.luceno@silicon-gears.com> | 2019-03-07 18:00:52 +0000 |
|---|---|---|
| committer | Heiko Schocher <hs@denx.de> | 2019-03-08 05:53:17 +0100 |
| commit | 3ad31eb1cc6ed4b9a54529df5a30c8321a0ec0de (patch) | |
| tree | b5a10bca49b61f639f7d5ca6620938326aa77a82 /drivers/i2c/rcar_i2c.c | |
| parent | 3b59eaef4fa6139b86203db55b2e90aad1befa61 (diff) | |
i2c: rcar_i2c: Fix sending of slave addresses
Do the reset before clearing the MSR, otherwise it may result in a read
or write operation instead if the start condition is repeated.
Signed-off-by: Ismael Luceno <ismael.luceno@silicon-gears.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Diffstat (limited to 'drivers/i2c/rcar_i2c.c')
| -rw-r--r-- | drivers/i2c/rcar_i2c.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/i2c/rcar_i2c.c b/drivers/i2c/rcar_i2c.c index d7b27204cb..a88fbcf34f 100644 --- a/drivers/i2c/rcar_i2c.c +++ b/drivers/i2c/rcar_i2c.c @@ -134,9 +134,11 @@ static int rcar_i2c_set_addr(struct udevice *dev, u8 chip, u8 read) } writel((chip << 1) | read, priv->base + RCAR_I2C_ICMAR); - writel(0, priv->base + RCAR_I2C_ICMSR); + /* Reset */ writel(RCAR_I2C_ICMCR_MDBS | RCAR_I2C_ICMCR_MIE | RCAR_I2C_ICMCR_ESG, priv->base + RCAR_I2C_ICMCR); + /* Clear Status */ + writel(0, priv->base + RCAR_I2C_ICMSR); ret = wait_for_bit_le32(priv->base + RCAR_I2C_ICMSR, mask, true, 100, true); |