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authorAdam Ford <aford173@gmail.com>2017-02-06 11:31:43 -0600
committerJaehoon Chung <jh80.chung@samsung.com>2017-02-09 20:37:06 +0900
commit6aca17c9b7e8d311c86d4cf54daef65bdf68ef73 (patch)
treec3667e90cb45816db0d1f0f1690f8a3e33167382 /drivers/mmc/omap_hsmmc.c
parentd14f1d511a8070f6c435a3ccc300ae488449706e (diff)
drivers: mmc: omap_hsmmc: Fix IO Buffer on OMAP36xx
On the OMAP36xx/37xx the CONTROL_WKUP_CTRL register has a field (bit 6) named GPIO_IO_PWRDNZ. If 0, the IO buffers which are related to GPIO_126, 127 and 129 are disabled. Some boards may need this for MMC. After the PBIAS is configured, this bit should be set high to enable these GPIO pins. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'drivers/mmc/omap_hsmmc.c')
-rw-r--r--drivers/mmc/omap_hsmmc.c18
1 files changed, 18 insertions, 0 deletions
diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c
index 5bb628d125..b63ce565f2 100644
--- a/drivers/mmc/omap_hsmmc.c
+++ b/drivers/mmc/omap_hsmmc.c
@@ -38,6 +38,7 @@
#include <asm/arch/sys_proto.h>
#endif
#include <dm.h>
+#include <asm/arch-omap3/mux.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -102,6 +103,9 @@ static unsigned char mmc_board_init(struct mmc *mmc)
t2_t *t2_base = (t2_t *)T2_BASE;
struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
u32 pbias_lite;
+#ifdef CONFIG_MMC_OMAP36XX_PINS
+ u32 wkup_ctrl = readl(OMAP34XX_CTRL_WKUP_CTRL);
+#endif
pbias_lite = readl(&t2_base->pbias_lite);
pbias_lite &= ~(PBIASLITEPWRDNZ1 | PBIASLITEPWRDNZ0);
@@ -109,12 +113,26 @@ static unsigned char mmc_board_init(struct mmc *mmc)
/* for cairo board, we need to set up 1.8 Volt bias level on MMC1 */
pbias_lite &= ~PBIASLITEVMODE0;
#endif
+#ifdef CONFIG_MMC_OMAP36XX_PINS
+ if (get_cpu_family() == CPU_OMAP36XX) {
+ /* Disable extended drain IO before changing PBIAS */
+ wkup_ctrl &= ~OMAP34XX_CTRL_WKUP_CTRL_GPIO_IO_PWRDNZ;
+ writel(wkup_ctrl, OMAP34XX_CTRL_WKUP_CTRL);
+ }
+#endif
writel(pbias_lite, &t2_base->pbias_lite);
writel(pbias_lite | PBIASLITEPWRDNZ1 |
PBIASSPEEDCTRL0 | PBIASLITEPWRDNZ0,
&t2_base->pbias_lite);
+#ifdef CONFIG_MMC_OMAP36XX_PINS
+ if (get_cpu_family() == CPU_OMAP36XX)
+ /* Enable extended drain IO after changing PBIAS */
+ writel(wkup_ctrl |
+ OMAP34XX_CTRL_WKUP_CTRL_GPIO_IO_PWRDNZ,
+ OMAP34XX_CTRL_WKUP_CTRL);
+#endif
writel(readl(&t2_base->devconf0) | MMCSDIO1ADPCLKISEL,
&t2_base->devconf0);