summaryrefslogtreecommitdiff
path: root/drivers/mmc/rockchip_sdhci.c
diff options
context:
space:
mode:
authorTom Rini <trini@konsulko.com>2018-03-29 08:25:56 -0400
committerTom Rini <trini@konsulko.com>2018-03-29 08:25:56 -0400
commit2476d26fd307edc84e8257dc1bccefb65547f88a (patch)
treed3902f654ff75f2555841cf4594ef01dc1d9f0b9 /drivers/mmc/rockchip_sdhci.c
parent81cf7c8d45935a295991fe2cd1df286f0f47511f (diff)
parent6837c58666165b7b040bf5a5b9dfebc8354f5883 (diff)
Merge git://git.denx.de/u-boot-rockchip
Diffstat (limited to 'drivers/mmc/rockchip_sdhci.c')
-rw-r--r--drivers/mmc/rockchip_sdhci.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index be6edb2eae..ab89be4764 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -62,6 +62,13 @@ static int arasan_sdhci_probe(struct udevice *dev)
host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD;
host->max_clk = max_frequency;
+ /*
+ * The sdhci-driver only supports 4bit and 8bit, as sdhci_setup_cfg
+ * doesn't allow us to clear MMC_MODE_4BIT. Consequently, we don't
+ * check for other bus-width values.
+ */
+ if (host->bus_width == 8)
+ host->host_caps |= MMC_MODE_8BIT;
ret = sdhci_setup_cfg(&plat->cfg, host, 0, EMMC_MIN_FREQ);
@@ -82,6 +89,7 @@ static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev)
host->name = dev->name;
host->ioaddr = dev_read_addr_ptr(dev);
+ host->bus_width = dev_read_u32_default(dev, "bus-width", 4);
#endif
return 0;