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author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-06-29 19:38:59 +0900 |
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committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-07-02 05:44:29 +0900 |
commit | 5e25b9d5d90205ce9531677e362e9dd9359963b3 (patch) | |
tree | d085fd64c64d2d9f7d669c539e247876beafb7bb /drivers/mmc/s5p_sdhci.c | |
parent | 3379987e26956d9eab668a0811a0f0a9a056754f (diff) |
pinctrl: uniphier: support pin configuration for dedicated pins
PH1-LD4 and PH1-sLD8 SoCs have pins that support pin configuration
(pin biasing, drive strength control), but not pin-muxing.
Allow to fill the mux value table with -1 for those pins; pins with
mux value -1 will be skipped in the pin-mux set function. The mux
value type should be changed from "unsigned" to "int" in order to
accommodate -1 as a special case.
[ Linux commit: 363c90e743b50a432a91a211dd8b078d9df446e9 ]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'drivers/mmc/s5p_sdhci.c')
0 files changed, 0 insertions, 0 deletions