diff options
| author | Marek Vasut <marek.vasut+renesas@gmail.com> | 2019-05-19 03:47:07 +0200 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2019-05-21 22:15:32 +0200 |
| commit | b5900a58caf0416355ccab4dc9da55c9a388a953 (patch) | |
| tree | 1ff501649efb9428ea094815eb83a30f931d4ede /drivers/mmc/tmio-common.h | |
| parent | 1bac2b6b415bdeee35c21a30292a50ca2a614871 (diff) | |
mmc: tmio: sdhi: HS400 manual adjustment
Since Gen3 SDHI has an internal DS signal AC-spec violation in HS400 mode,
CRC-error may occur in read command in HS400 mode. This phoenomenon occurs
at low/high temperature.
To fix this, after completion of HS400 tuning, enable manual calibration.
However, Gen3 M3 Ver.1.2 or earlier and H3 1.x does not support HS400.
These SoC forcibly use HS200 mode by SoC attribute.
The DT adjustment of the tuning parameters is not supported until the
DT property names become clear.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Adapted from a patch by Takeshi Saito <takeshi.saito.xv@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'drivers/mmc/tmio-common.h')
| -rw-r--r-- | drivers/mmc/tmio-common.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/mmc/tmio-common.h b/drivers/mmc/tmio-common.h index 58ce3d65b0..51607de142 100644 --- a/drivers/mmc/tmio-common.h +++ b/drivers/mmc/tmio-common.h @@ -139,6 +139,10 @@ struct tmio_sd_priv { #if CONFIG_IS_ENABLED(RENESAS_SDHI) u8 tap_set; u8 nrtaps; + bool needs_adjust_hs400; + bool adjust_hs400_enable; + u8 adjust_hs400_offset; + u8 adjust_hs400_calibrate; #endif ulong (*clk_get_rate)(struct tmio_sd_priv *); }; |