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authorHannes Schmelzer <hannes.schmelzer@br-automation.com>2018-03-07 08:00:57 +0100
committerJaehoon Chung <jh80.chung@samsung.com>2018-05-02 10:57:43 +0900
commit4781921630f9f2dd1165cc1e79494893e8e9bd3c (patch)
treea6dbd41cffb381eae323fef83d8b56e5aa14a617 /drivers/mmc
parent88a57125fa689f3207c5409ef6eeb6a47ff051cd (diff)
mmc: zynq_sdhci: use correct quirk if CONFIG_ZYNQ_HISPD_BROKEN is defined
The 'SDHCI_QUIRK_NO_HISPD_BIT' is used wrong here. The purpose of this quirk is to tell the sdhci-driver that the IP-core doesn't have a "high- speed-enable" bit in its registers. With this commit we change this to the correct quirk: SDHCI_QUIRK_BROKEN_HISPD_MODE Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Diffstat (limited to 'drivers/mmc')
-rw-r--r--drivers/mmc/zynq_sdhci.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
index 9463a06ebc..76fe97f6ef 100644
--- a/drivers/mmc/zynq_sdhci.c
+++ b/drivers/mmc/zynq_sdhci.c
@@ -54,7 +54,7 @@ static int arasan_sdhci_probe(struct udevice *dev)
SDHCI_QUIRK_BROKEN_R1B;
#ifdef CONFIG_ZYNQ_HISPD_BROKEN
- host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT;
+ host->quirks |= SDHCI_QUIRK_BROKEN_HISPD_MODE;
#endif
host->max_clk = clock;